Philips BSP128 Datasheet
DISCRETE SEMICONDUCTORS
DATA SH EET
BSP128
N-channel enhancement mode
vertical D-MOS transistor
Product specification
File under Discrete Semiconductors, SC13b
April 1995
Philips Semiconductors Product specification
N-channel enhancement mode vertical
D-MOS transistor
FEATURES
• Direct interface to C-MOS, TTL,
etc.
• High-speed switching
• No secondary breakdown.
DESCRIPTION
N-channel enhancement mode
vertical D-MOS transistor in a
SOT223 envelope and intended for
use as a line current interruptor in
telephone sets and for applications in
relay, high-speed and line
transformer drivers.
PINNING - SOT223
PIN DESCRIPTION
Code: BSP128
1 gate
2 drain
3 source
4 drain
QUICK REFERENCE DATA
SYMBOL PARAMETER MAX. UNIT
V
DS
I
D
R
DS(on)
V
GS(th)
drain-source voltage 200 V
DC drain current 350 mA
drain-source on-resistance 8 Ω
gate-source threshold voltage 1.8 V
handbook, halfpage
Fig.1 Simplified outline (SOT223) and symbol.
123
Top view
BSP128
4
g
MAM054
d
s
LIMITING VALUES
In accordance with the Absolute Maximum System (IEC 134).
SYMBOL P ARAMETER CONDITIONS MIN. MAX. UNIT
V
±V
I
D
I
DM
P
T
T
DS
GSO
tot
stg
j
drain-source voltage − 200 V
gate-source voltage open drain − 20 V
DC drain current − 350 mA
peak drain current − 1.4 A
total power dissipation up to T
= 25 °C (note 1) − 1.5 W
amb
storage temperature range −65 150 °C
junction temperature − 150 °C
THERMAL RESISTANCE
SYMBOL PARAMETER THERMAL RESISTANCE
R
th j-a
from junction to ambient (note 1) 83.3 K/W
Note
1. Device mounted on an epoxy printed circuit board, 40 x 40 x 1.5 mm, mounting pad for the drain tab minimum 6 cm
2
.
April 1995 2
Philips Semiconductors Product specification
N-channel enhancement mode vertical
BSP128
D-MOS transistor
CHARACTERISTICS
T
= 25 °C unless otherwise specified.
j
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
V
(BR)DSS
I
DSS
±I
GSS
V
GS(th)
R
DS(on)
Y
transfer admittance ID = 300 mA; VDS = 25 V 200 400 − mS
fs
C
iss
C
oss
C
rss
Switching times (see Figs 2 and 3)
t
on
t
off
drain-source breakdown voltage ID = 10 µA; VGS = 0 200 −−V
drain-source leakage current VDS = 160 V; VGS = 0 −−1µA
gate-source leakage current ±VGS = 20 V; VDS = 0 −−100 nA
gate-source threshold voltage ID = 1 mA; VGS = V
DS
0.4 − 1.8 V
drain-source on-resistance ID = 100 mA; VGS = 2.8 V − 58Ω
input capacitance VDS = 25 V; VGS = 0; f = 1 MHz − 50 80 pF
output capacitance VDS = 25 V; VGS = 0; f = 1 MHz − 20 30 pF
feedback capacitance VDS = 25 V; VGS = 0; f = 1 MHz − 510pF
turn-on time ID = 250 mA; VDD = 50 V;
− 510ns
VGS= 0 to 10 V
turn-off time ID = 250 mA; VDD = 50 V;
− 20 30 ns
VGS= 0 to 10 V
handbook, halfpage
10 V
0 V
VDD=50V.
VDD = 50 V
I
D
50 Ω
MBB691
Fig.2 Switching times test circuit.
handbook, halfpage
INPUT
OUTPUT
Fig.3 Input and output waveforms.
10 %
t
on
90 %
90 %
10 %
t
off
MBB692
April 1995 3
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