Philips bsp108 DATASHEETS

DISCRETE SEMICONDUCTORS

DATA SH EET

BSP108

N-channel enhancement mode
vertical D-MOS transistor

Product specification
File under Discrete Semiconductors, SC13b

April 1995

Philips Semiconductors Product specification

N-channel enhancement mode vertical
D-MOS transistor

DESCRIPTION

N-channel enhancement mode
vertical D-MOS transistor in a
miniature SOT223 envelope and
intended for use in relay, high-speed
and line-transformer drivers.

FEATURES

• Direct interface to C-MOS, TTL,
etc.

• High-speed switching

• No secondary breakdown

PINNING - SOT223

1 = gate
2 = drain
3 = source
4 = drain

QUICK REFERENCE DATA

Drain-source voltage V
Gate-source voltage (open drain) ± V
Drain current (DC) I
Total power dissipation up to T
Drain-source ON-resistance

Transfer admittance

I

= 500 mA; VDS=15V Yfs

D

=25°CP

amb

DS

D

tot

DS(on)

GSO

BSP108

max. 80 V
max. 20 V
max. 500 mA
max. 1.5 W

typ.
max.

min.
typ.

2.0

3.0ΩΩID= 500 mA; VGS=10V R

150
300mSmS

Marking code

BSP108

PIN CONFIGURATION

handbook, halfpage

Top view

4

123

MAM054

d

g

s

Fig.1 Simplified outline and symbol.

April 1995 2

Philips Semiconductors Product specification

N-channel enhancement mode vertical

BSP108

D-MOS transistor

RATINGS

Limiting values in accordance with the Absolute Maximum System (IEC 134)

Drain-source voltage V
Gate-source voltage (open drain) ± V
Drain current (DC) I
Drain current (peak) I
Total power dissipation up to T

=25°C (note 1) P

amb

Storage temperature range T
Junction temperature T

DS

GSO
D
DM

tot
stg
j

THERMAL RESISTANCE

From junction to ambient (note 1) R

th j-a

Note

1. Device mounted on an epoxy printed-circuit board 40 mm × 40 mm × 1.5 mm; mounting pad for the collector lead
min. 6 cm

2

.

max. 80 V
max. 20 V
max. 500 mA
max. 1.0 A
max. 1.5 W

−65 to + 150 °C

max. 150 °C

= 83.3 K/W

CHARACTERISTICS

=25°C unless otherwise specified

T

j

Drain-source breakdown voltage

I

=10µA; VGS=0 V

D

Gate threshold voltage

ID= 1 mA; VGS=V

DS

Gate-source leakage current

± V

=20V; VDS=0 I

GS

Drain-source leakage current

V

= 60 V; VGS=0 I

DS

Drain-source ON-resistance

= 500 mA; VGS=10V R

I

D

Transfer admittance

= 500 mA; VDS=15V Yfs

I

D

Input capacitance at f = 1 MHz;

= 10 V; VGS=0 C

DS

(BR) DSS

V

GS (th)

GSS

DSS

DS(on)

iss

min. 80 V

min.
max.

1.5

3.5VV

max. 100 nA

max. 1.0 µA

typ.
max.

min.
typ.

2.0

3.0ΩΩ

150
300mSmS

typ.
max.4560pFpFV

Output capacitance at f = 1 MHz;

= 10 V; VGS=0 C

V

DS

April 1995 3

oss

typ.
max.3045pFpF

Philips Semiconductors Product specification

N-channel enhancement mode vertical
D-MOS transistor

Feedback capacitance at f = 1 MHz;

= 10 V; VGS=0 C

V

DS

Switching times (see Figs 2 and 3)

I

= 500 mA; VDD=50V

D

VGS= 0 to 10 V t

handbook, halfpage

VDD = 50 V

handbook, halfpage

INPUT

BSP108

rss

on

t

off

typ.
max.812pFpF

typ.
max.

48ns

ns

typ.
max.1015nsns

90 %

10 V

0 V

50 Ω

I

D

MSA631

Fig.2 Switching times test circuit.

10 %

90 %

OUTPUT

t

on

Fig.3 Input and output waveforms.

10 %

t

off

MBB692

April 1995 4