Philips BSP106 Datasheet
DISCRETE SEMICONDUCTORS
DATA SH EET
BSP106
N-channel enhancement mode
vertical D-MOS transistor
Product specification
File under Discrete Semiconductors, SC13b
April 1995
Philips Semiconductors Product specification
N-channel enhancement mode vertical
D-MOS transistor
FEATURES
• Very low R
DS(on)
• Direct interface to C-MOS, TTL,
etc.
• High-speed switching
• No secondary breakdown.
DESCRIPTION
N-channel enhancement mode
vertical D-MOS transistor in a
miniature SOT223 envelope and
intended for use in relay, high-speed
and line transformer drivers.
PINNING - SOT223
PIN DESCRIPTION
1 gate
2 drain
3 source
4 drain
QUICK REFERENCE DATA
SYMBOL PARAMETER CONDITIONS MAX. UNIT
V
DS
I
D
R
DS(on)
V
GS(th)
drain-source voltage − 60 V
drain current DC value 425 mA
drain-source on-resistance ID = 200 mA
gate-source threshold
voltage
PIN CONFIGURATION
handbook, halfpage
123
Top view
BSP106
4 Ω
VGS= 10 V
ID = 1 mA
VGS=V
4
g
MAM054
DS
d
s
3V
Fig.1 Simplified outline and symbol.
April 1995 2
Philips Semiconductors Product specification
N-channel enhancement mode vertical
BSP106
D-MOS transistor
LIMITING VALUES
In accordance with the Absolute Maximum System (IEC 134).
SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT
V
DS
V
DG
±V
GSO
I
D
I
DM
P
tot
T
stg
T
j
THERMAL RESISTANCE
SYMBOL PARAMETER VALUE UNIT
R
th j-a
drain-source voltage − 60 V
drain-gate voltage − 60 V
gate-source voltage − 20 V
drain current DC value − 425 mA
drain current peak value − 850 mA
total power dissipation up to T
amb
= 25 °C
− 1.5 W
(note 1)
storage temperature range −55 150 °C
junction temperature − 150 °C
from junction to ambient
83.3 K/W
(note 1)
Note
1. Device mounted on an epoxy printed-circuit board 40 x 40 x 1.5 mm;
2
mounting pad for the drain lead minimum 6 cm
.
April 1995 3
Philips Semiconductors Product specification
N-channel enhancement mode vertical
BSP106
D-MOS transistor
CHARACTERISTICS
T
= 25 °C unless otherwise specified.
j
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
V
(BR)DSS
drain-source breakdown voltage ID = 10 µA
VGS = 0
I
DSS
drain-source leakage current VDS = 48 V
VGS = 0
V
VGS = 0
±I
GSS
gate-source leakage current VDS = 0
±VGS = 15 V
V
GS(th)
gate-source threshold voltage ID = 1 mA
VGS = V
R
DS(on)
drain-source on-resistance ID = 200 mA
VGS = 10 V
Y
transfer admittance ID = 200 mA
fs
VDS = 10 V
C
iss
input capacitance VDS = 10 V
VGS = 0
f = 1 MHz
C
oss
output capacitance VDS = 10 V
VGS = 0
f = 1 MHz
C
rss
feedback capacitance VDS = 10 V
VGS = 0
f = 1 MHz
= 25 V
DS
DS
60 90 − V
−−1 µA
−−0.5 µA
−−10 nA
0.8 − 3V
− 2.5 4 Ω
100 200 − mS
− 25 40 pF
− 22 30 pF
− 610 pF
Switching times (see Figs 2 and 3)
t
on
t
off
turn-on time ID = 200 mA
turn-off time ID = 200 mA
April 1995 4
− 25 ns
VDD = 50 V
VGS = 0 to 10 V
− 10 15 ns
VDD = 50 V
VGS = 0 to 10
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