DISCRETE SEMICONDUCTORS
DATA SH EET
BSN274; BSN274A
N-channel enhancement mode
vertical D-MOS transistor
Product specification
File under Discrete Semiconductors, SC13b
April 1995
Philips Semiconductors Product specification
N-channel enhancement mode vertical
D-MOS transistor
FEATURES
• Direct interface to C-MOS, TTL,
etc., due to low threshold voltage
• High speed switching
• No secondary breakdown
DESCRIPTION
Silicon n-channel enhancement
mode vertical D-MOS transistor in
TO-92 variant envelope and intended
for use as a line current interruptor in
telephone sets and for applications in
relay, high speed and line transformer
drivers.
QUICK REFERENCE DATA
SYMBOL PARAMETER MAX. UNIT
V
DS
I
D
R
DS(on)
V
GS(th)
drain-source voltage 270 V
drain current (DC) 250 mA
drain-source on-resistance 8 Ω
threshold voltage 2 V
PINNING (BSN274)
PIN DESCRIPTION
1 gate
2 drain
3 source
PINNING (BSN274A)
PIN DESCRIPTION
1 source
2 gate
3 drain
BSN274; BSN274A
PIN CONFIGURATION - TO-92 VARIANT
handbook, halfpage
1
Note: Other pinnings are available on request.
d
2
3
g
MAM146
s
Fig.1 Simplified outline and symbol.
April 1995 2
Philips Semiconductors Product specification
N-channel enhancement mode vertical
BSN274; BSN274A
D-MOS transistor
LIMITING VALUES
In accordance with the Absolute Maximum System (IEC 134)
SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT
V
DS
±V
GSO
I
D
I
DM
P
tot
T
stg
T
j
THERMAL RESISTANCE
SYMBOL PARAMETER VALUE UNIT
R
th j-a
Notes
1. Transistor mounted on printed circuit board, maximum lead length 4 mm, mounting pad for drain leads minimum
10 mm × 10 mm.
drain-source voltage − 270 V
gate-source voltage open drain − 20 V
drain current DC − 250 mA
drain current peak − 1A
total power dissipation up to T
=25°C (note 1) − 1W
amb
storage temperature range −65 150 °C
operating junction temperature − 150 °C
from junction to ambient (note 1) 125 K/W
CHARACTERISTICS
=25°C unless otherwise specified.
T
j
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
V
(BR)DSS
drain-source breakdown voltage VGS=0
270 −−V
ID=10µA
I
DSS
drain-source leakage current VDS= 220 V
−− 1µA
VGS=0
±I
GSS
gate-source leakage current ±VGS=20V
−− 100 nA
VDS=0
V
GS(th)
R
DS(on)
gate threshold voltage ID=1mA
VDS=V
GS
drain-source on-resistance ID= 250 mA
0.8 − 2V
− 6.5 8 Ω
VGS=10V
R
DS(on)
drain-source on-resistance ID=20mA
− 914Ω
VGS= 2.4 V
transfer admittance ID= 250 mA
Y
fs
200 400 − mS
VDS=25V
C
iss
input capacitance VDS=25V
− 65 90 pF
VGS=0
f=1MHz
C
oss
output capacitance VDS=25V
− 20 30 pF
VGS=0
f=1MHz
April 1995 3