DISCRETE SEMICONDUCTORS
DATA SH EET
BSN10; BSN10A
N-channel enhancement mode
vertical D-MOS transistors
Product specification
File under Discrete Semiconductors, SC13b
April 1995
Philips Semiconductors Product specification
N-channel enhancement mode vertical
D-MOS transistors
FEATURES
• Direct interface to C-MOS, TTL,
etc.
• High-speed switching
• No secondary breakdown.
DESCRIPTION
N-channel enhancement mode
vertical D-MOS transistor in a TO-92
envelope, intended for use in general
purpose fast switching applications.
PINNING - TO-92
PIN DESCRIPTION
BSN10
1 gate
2 drain
3 source
BSN10A
1 source
2 gate
3 drain
QUICK REFERENCE DATA
SYMBOL PARAMETER MAX. UNIT
V
DS
I
D
R
DS(on)
V
GS(th)
dbook, halfpage
Fig.1 Simplified outline (TO-92) and symbol.
BSN10; BSN10A
drain-source voltage 50 V
DC drain current 175 mA
drain-source on-resistance 15 Ω
gate-source threshold voltage 1.8 V
1
2
3
MSB033
handbook, 2 columns
g
MBB076 - 1
d
s
LIMITING VALUES
In accordance with the Absolute Maximum System (IEC 134).
SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT
V
±V
I
D
I
DM
P
T
T
DS
GSO
tot
stg
j
drain-source voltage − 50 V
gate-source voltage open drain − 20 V
DC drain current − 175 mA
peak drain current − 300 mA
total power dissipation up to T
=25°C (note 1) − 830 mW
amb
storage temperature range −65 150 °C
junction temperature − 150 °C
THERMAL RESISTANCE
SYMBOL PARAMETER THERMAL RESISTANCE
R
th j-a
from junction to ambient (note 1) 150 K/W
Note
1. Device mounted on a printed circuit board, maximum lead length 4 mm.
April 1995 2
Philips Semiconductors Product specification
N-channel enhancement mode vertical
BSN10; BSN10A
D-MOS transistors
CHARACTERISTICS
T
=25°C unless otherwise specified.
j
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
V
(BR)DSS
I
DSS
±I
GSS
V
GS(th)
R
DS(on)
Y
transfer admittance ID= 100 mA; VDS= 10 V 40 80 − mS
fs
C
iss
C
oss
C
rss
Switching times
t
on
t
off
drain-source breakdown voltage ID=10µA; VGS= 0 50 −− V
drain-source leakage current VDS= 40 V; VGS=0 −−1µA
gate-source leakage current ±VGS= 20 V; VDS=0 −−100 nA
gate-source threshold voltage ID= 1 mA; VGS= V
DS
0.4 − 1.8 V
drain-source on-resistance ID= 100 mA; VGS= 10 V − 815Ω
I
= 100 mA; VGS=5 V − 12 20 Ω
D
= 10 mA; VGS= 2.5 V − 18 30 Ω
I
D
input capacitance VDS= 10 V; VGS= 0; f = 1 MHz − 815pF
output capacitance VDS= 10 V; VGS= 0; f = 1 MHz − 715pF
feedback capacitance VDS= 10 V; VGS= 0; f = 1 MHz − 25 pF
turn-on time ID= 100 mA; VDD= 20 V;
− 25 ns
VGS= 0 to 10 V
turn-off time ID= 100 mA; VDD= 50 V;
− 510ns
VGS= 0 to 10 V
150
T
amb
MDA690
(°C)
handbook,
P
(W)
1
tot
0.8
0.6
0.4
0.2
0
0 50 100 200
Fig.2 Power derating curve.
April 1995 3
30
handbook, halfpage
C
(pF)
20
10
0
0 5 10 15 20 25
VGS= 0; f = 1 MHz; Tj= 25 °C.
MRA781
(1)
(2)
(3)
VDS (V)
Fig.3 Capacitance as a function of drain-source
voltage, typical values.