DISCRETE SEMICONDUCTORS
DATA SH EET
BS108
N-channel enhancement mode
vertical D-MOS transistor
Product specification
File under Discrete Semiconductors, SC13b
April 1995
Philips Semiconductors Product specification
N-channel enhancement mode vertical
D-MOS transistor
FEATURES
• Direct interface to C-MOS, TTL,
etc.
• High-speed switching
• No secondary breakdown.
DESCRIPTION
N-channel enhancement mode
vertical D-MOS transistor in a TO-92
envelope, intended for use as a line
current interruptor in telephone sets
and for applications in relay,
high-speed and line transformer
drivers.
PINNING
PIN DESCRIPTION
1 source
2 gate
3 drain
QUICK REFERENCE DATA
SYMBOL PARAMETER MAX. UNIT
V
DS
I
D
R
DS(on)
V
GS(th)
BS108
drain-source voltage 200 V
DC drain current 250 mA
drain-source on-resistance 8 Ω
gate-source threshold voltage 1.8 V
handbook, halfpage
handbook, 2 columns
1
2
3
g
MSB033
MBB076 - 1
Fig.1 Simplified outline (TO-92) and symbol.
d
s
April 1995 2
Philips Semiconductors Product specification
N-channel enhancement mode vertical
BS108
D-MOS transistor
LIMITING VALUES
In accordance with the Absolute Maximum System (IEC 134).
SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT
V
DS
±V
GSO
I
D
I
DM
P
tot
T
stg
T
j
THERMAL RESISTANCE
SYMBOL PARAMETER THERMAL RESISTANCE
R
th j-a
Note
1. Device mounted on a printed-circuit board, maximum lead length 4 mm; mounting pad for the drain lead minimum
10 × 10 mm
drain-source voltage − 200 V
gate-source voltage open drain − 20 V
DC drain current − 250 mA
peak drain current − 1A
total power dissipation up to T
= 25 °C (note 1) − 1W
amb
storage temperature range −65 150 °C
junction temperature − 150 °C
from junction to ambient (note 1) 125 K/W
CHARACTERISTICS
= 25 °C unless otherwise specified.
T
j
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
V
(BR)DSS
I
DSS
I
GSS
V
GS(th)
R
DS(on)
transfer admittance ID = 300 mA; VDS = 25 V 200 400 − mS
Y
fs
C
iss
drain-source breakdown voltage ID = 10 µA; VGS = 0 200 −−V
drain-source leakage current VDS = 160 V; VGS = 0 −−1µA
gate-source leakage current ±VGS = 20 V; VDS = 0 −−100 nA
gate-source threshold voltage ID = 1 mA; VGS = V
DS
0.4 − 1.8 V
drain-source on-resistance ID = 100 mA; VGS = 2.8 V − 58Ω
input capacitance VDS = 25 V; VGS = 0;
− 50 80 pF
f = 1 MHz
C
oss
output capacitance VDS = 25 V; VGS = 0;
− 20 30 pF
f = 1 MHz
C
rss
feedback capacitance VDS = 25 V; VGS = 0;
− 510pF
f = 1 MHz
Switching times (see Figs 2 and 2)
t
on
turn-on time ID = 250 mA; VDD = 50 V;
− 510ns
VGS= 0 to 10 V
t
off
turn-off time ID = 250 mA; VDD = 50 V;
− 20 30 ns
VGS= 0 to 10 V
April 1995 3