Philips BS107A Datasheet

DISCRETE SEMICONDUCTORS

DATA SH EET

BS107A

N-channel enhancement mode
vertical D-MOS transistor

Product specification
File under Discrete Semiconductors, SC13b

April 1995

Philips Semiconductors Product specification

N-channel enhancement mode vertical
D-MOS transistor

FEATURES

• Direct interface to C-MOS, TTL,
etc.

• High-speed switching

• No second breakdown

DESCRIPTION

N-channel enhancement mode
vertical D-MOS transistor in TO-92
envelope and designed for use as line
current interrupter in telephone sets
and for application in relay,
high-speed and line-transformer
drivers.

PINNING - TO-92

1 = source
2 = gate
3 = drain

QUICK REFERENCE DATA

Drain-source voltage V
Gate-source voltage (open drain) ± V
Drain current (DC) I
Total power dissipation up to T
Drain-source ON-resistance

ID= 250 mA; VGS= 10 V R

Transfer admittance

I

= 250 mA; VGS= 25 V  Yfs

D

=25°CP

case

DS

D

tot

DS(on)

max. 200 V
max. 20 V

GSO

max. 250 mA
max. 0.6 W

typ.
max.

min.
typ.

BS107A

4.5

6.4ΩΩ

200
350mSmS

PIN CONFIGURATION

handbook, halfpage

Note: Various pinnings are available.

1

2

3

MSB033

handbook, 2 columns

g

MBB076 - 1

d

s

Fig.1 Simplified outline and symbol.

April 1995 2

Philips Semiconductors Product specification

N-channel enhancement mode vertical
D-MOS transistor

RATINGS

Limiting values in accordance with the Absolute Maximum System (IEC 134)

Drain-source voltage V
Gate-source voltage (open drain) ± V
Drain current (DC) I
Drain current (peak) I
Total power dissipation up to T

= 25 °CP

case

Storage temperature T
Junction temperature T

DS

GSO
D
DM

tot
stg
j

THERMAL RESISTANCE

From junction to ambient (note 1) R

th j-a

Note

1. Transistor mounted on printed circuit board, max. lead length 4 mm, mounting pad for collector lead
min. 10 mm × 10 mm.

max. 200 V
max. 20 V
max. 250 mA
max. 500 mA
max. 0.6 W

−55 to +150 °C

max. 150 °C

= 125 K/W

BS107A

April 1995 3