Datasheet BLF1049 Datasheet (Philips)

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DISCRETE SEMICONDUCTORS
DATA SH EET
book, halfpage
M3D379
BLF1049
Base station LDMOS transistor
Product specification Supersedes data of 2001 Dec 05
2003 May 14
Philips Semiconductors Product specification
Base station LDMOS transistor BLF1049
FEATURES
Typical performance at a supply voltage of 27 V: – 1-tone CW; IDQ= 1000 mA – Output power = 125 W – Gain = 16.5 dB – Efficiency = 54% – EDGE output power = 45 W (AV) – ACPR400 = 64 dBc at 400 kHz
(EDGE; IDQ= 750 mA)
– EVM = 2% rms (AV)
(EDGE; IDQ= 750 mA)
Easy power control
Excellent ruggedness
High power gain
Excellent thermal stability
Designed for broadband operation (800 to 1000 MHz)
Internally matched for ease of use.
APPLICATIONS
RF power amplifier for GSM, EDGE and CDMA base stations and multicarrier applications in the 800 to 1000 MHz frequency range.
DESCRIPTION
125 W LDMOS power transistor for base station applications at frequencies from 800 MHz to 1000 MHz.
PINNING - SOT502A
PIN DESCRIPTION
1 drain 2 gate 3 source; connected to flange
handbook, halfpage
Top view
1
2
3
MBK394
Fig.1 Simplified outline SOT502A .
QUICK REFERENCE DATA
Typical RF performance at Th=25°C in a common source test circuit.
MODE OF OPERATION
f
(MHz)
2-tone 1-tone CW 125 16.5 54 −−−
920
P
L
(W)
125 (PEP) 15.5 37 32 −−
G
(dB)
p
η
(%)
D
d
(dBc)
3
ACPR 400
(dBc)
EVM
% rms
(AV)
GSM EDGE 45 (AV) 15 32 −−64 2
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 60134).
SYMBOL PARAMETER MIN. MAX. UNIT
V
DS
V
GS
T
stg
T
j
drain-source voltage 75 V gate-source voltage −±15 V storage temperature 65 150 °C junction temperature 200 °C
2003 May 14 2
Philips Semiconductors Product specification
Base station LDMOS transistor BLF1049
THERMAL CHARACTERISTICS
SYMBOL PARAMETER CONDITIONS VALUE UNIT
R
th j-c
R
th j-h
Notes
1. Thermal resistance is determined under RF operating conditions.
2. Depending on mounting condition in application.
CHARACTERISTICS
Tj=25°C unless otherwise specified.
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
V
(BR)DSS
V
GSth
I
DSS
I
DSX
I
GSS
g
fs
R
DSon
thermal resistance from junction to case Th=25°C, PL= 35 W (AV), note 1 0.42 K/W thermal resistance from junction to heatsink Th=25°C, PL= 35 W (AV), note 2 0.62 K/W
drain-source breakdown voltage VGS= 0; ID= 3 mA 75 −−V gate-source threshold voltage VDS= 10 V; ID= 300 mA 4 5V drain-source leakage current VGS= 0; VDS=36V −−3µA on-state drain current VGS=V
+9V; VDS=10V 45 −−A
GSth
gate leakage current VGS= ±20 V; VDS=0 −−1µA forward transconductance VDS= 10 V; ID=10A 9 S drain-source on-state resistance VGS=9V; ID=10A 60 m
APPLICATION INFORMATION
RF performance in a common source class-AB circuit; V
Mode of operation: 2-tone CW, 100 kHz spacing; I
=27V; Th=25°C; unless otherwise specified.
DS
= 1130 mA; f = 890 MHz
DQ
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
G
p
η
D
gain power PL= 125 W (PEP) 14.6 15.5 dB
drain efficiency 33 37 % IRL input return loss −−12 6dB d
3
third order inter modulation
−−32 25 dBc
distortion
Mode of operation: GSM EDGE; IDQ= 750 mA; f = 920 MHz
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
G
p
η
D
gain power PL=45W(AV) 15 dB
drain efficiency 32 % ACPR 400 adjacent channel power ratio −−64 dBc EVM (AV) EVM rms average signal distortion 2 % EVM peak EVM rms peak signal distortion 2.2 %
Mode of operation: 1-tone CW; I
= 1000 mA; f = 920 MHz
DQ
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
G
p
η
D
gain power PL=P
= 125 W 16.5 dB
L 1 dB
drain efficiency 54 %
2003 May 14 3
Philips Semiconductors Product specification
Base station LDMOS transistor BLF1049
16
handbook, halfpage
G
p
(dB)
15
14
13
12
010
VDS= 27V; f = 920 MHz; IDQ= 750 mA; Th≤ 25 °C.
G
p
20 30 40
η
D
MLE061
PL (AV)(W)
Fig.2 GSM EDGE power gain and efficiency as
functions of load power; typical values.
40
η
D
(%)
30
20
10
0
50
62
handbook, halfpage
ACPR
400
(dBc)
64 EVM
66
ACPR400
68
70
010
VDS= 27 V; f = 920 MHz; IDQ= 750 mA; Th≤ 25 °C.
20 30 40
MLE062
P
(AV)(W)
L
2
EVM
rms
(AV)
(%)
1.5
1
0.5
0
50
Fig.3 GSM EDGE ACPR400 and EVM as
functions of average load power; typical values.
18
handbook, halfpage
G
p
(dB)
17
16
15
0 50 100 150
VDS= 27 V; f = 920 MHz; IDQ= 1000 mA;
MLE063
η
D
G
p
PL (AV) (W)
Fig.4 1-tone CW power gain and efficiency as
functions of load power; typical values.
60
40
20
0
η
(%)
MLE064
50
handbook, halfpage
η
(%)
40
D
30
20
10
0
0 50 100 150
VDS= 27 V; IDQ= 1.1 A; f1= 920.0 MHz; f2= 920.1 MHz.
(1) η at Th= 40 °C. (2) η at Th=20°C. (3) η at Th=80°C.
(4)
η(1,2,3)
(5)
(6)
PL (PEP) (W)
(4) gain at Th= 40 °C. (5) gain at Th=20°C. (6) gain at Th=80°C.
17
16.5
16
15.5
15
14.5
14
gain (dB)
Fig.5 2-tone power gain and efficiency as
functions of load power at different temperatures.
2003 May 14 4
Philips Semiconductors Product specification
Base station LDMOS transistor BLF1049
20
handbook, halfpage
d
3
(dBc)
30
40
(1)
50
60
0 50 100 150
VDS= 27 V; IDQ= 1.1 A; f1= 920.0 MHz; f2= 920.1 MHz.
(1) Th= 40 °C. (2) Th=20°C.
(2) (3)
(3) Th=80°C.
MLE065
PL (PEP) (W)
Fig.6 Third order intermodulation distortion as a
function of load power at different temperatures.
30
handbook, halfpage
d
5
(dBc)
40
50
60
70
0 50 100 150
VDS=27V;IDQ= 1.1 A; f1= 920.0 MHz; f2= 920.1 MHz.
(1) Th= 40 °C. (2) Th=20°C.
(3)
(1)
(2)
(3) Th=80°C.
MLE066
PL (PEP) (W)
Fig.7 Fifth order intermodulation distortion as a
function of load power at different temperatures.
40
handbook, halfpage
d
7
(dBc)
50
60
70
0
(1) Th= 40 °C. (2) Th=20°C.
50 100 150
VDS= 27 V; IDQ= 1.1 A; f1= 920.0 MHz;
(3) Th=80°C.
MLE067
(3)
(2)
(1)
PL (PEP) (W)
Fig.8 Seventh orderintermodulation distortion as
a function of load power at different temperatures.
20
handbook, halfpage
gain (dB)
15
10
5
0
0 50 100 150
VDS= 27 V; f1= 920.0 MHz; f2= 920.1 MHz.
(1) I
=1A.
DQ
(2) IDQ= 1.45 A.
(2)
(1)
(3)
(4)
=1A.
(3) I
DQ
(4) IDQ= 1.45 A.
MLE068
PL (PEP) (W)
Fig.9 Powergain anddrainefficiency asfunctions
of peak envelope load power; typical values.
40
30
20
10
0
η
(%)
D
2003 May 14 5
Philips Semiconductors Product specification
Base station LDMOS transistor BLF1049
handbook, halfpage
0
d
im
(dBc)
20
(1)
40
(4)
60
80
0 50 100 150
VDS= 27 V; f1= 920.0 MHz; f2= 920.1 MHz.
(1) d
; IDQ=1A.
3
(2) d5; IDQ=1A.
(2) (5)
(6) (3)
(3) d7; IDQ=1A. (4) d3; IDQ= 1.3 A.
MLE069
PL (PEP) (W)
(5) d5; IDQ= 1.3 A. (6) d7; IDQ= 1.3 A.
Fig.10 Intermodulation distortion as a function of
peak envelope load power; typical values.
handbook, halfpage
2
Z
i
()
1.5
1
0.5
0
0.5
1
0.85
Class-AB operation; VDS= 27 V; IDQ= 1125 mA; PL=35W. Values comprised for different parameters.
r
i
x
i
0.9 0.95 1
MLE070
f (GHz)
Fig.11 Input impedance as afunction of frequency
(series components); typical values.
handbook, halfpage
2
Z
L
()
1.5
1
0.5
0
0.5
1
0.85
Class-AB operation; VDS= 27 V; IDQ= 1125 mA; PL=35W. Values comprised for different parameters.
0.9 0.95 1
R
L
X
L
MLE071
f (GHz)
Fig.12 Input impedance as afunction of frequency
(series components); typical values.
handbook, halfpage
Fig.13 Definition of transistor impedance.
drain
Z
gate
Z
IN
L
MGS998
2003 May 14 6
Philips Semiconductors Product specification
Base station LDMOS transistor BLF1049
handbook, full pagewidth
L14
C13
C15
L15 L16
Vsupply
RF out
C18
Vbias
RF in
C2
Q1
R1
C1
L1 L2
C3
C4
L3
L5
L4 L6
C5
C6
L12
L9
C7
L7
L8
C8
Q2
L10
L13
C17
C9
C10
L11
C11 C12 C16
Fig.14 Test circuit for 860 to 900 MHz.
C14
MDB168
2003 May 14 7
Philips Semiconductors Product specification
Base station LDMOS transistor BLF1049
handbook, full pagewidth
PHILIPS
Input Rev C
Vbias in
C2
Q1
C3
C1L1 L2 L6
R1
C4
L3
L4
PHILIPS
Input Rev C
C5
PHILIPS
Output Rev C
C10
L11
C11 C12
C9
L14
L14
C15
C13
C14
L15
C17
C17
C18
C16
C16
Vd
in
L16
C6C6
L9
L5
C7
L7 L8
L7
C8
BLF1049
L12
L10
L13
PHILIPS
Output Rev C
60 60
4040
Dimensions in mm. The components are situated on one side of the copper-clad Rogers 6006 printed-circuit board (εr= 6.15); thickness = 25 mm.
The other side is unetched and serves as a ground plane.
MLE073
Fig.15 Component layout for 860 to 900 MHz test circuit.
2003 May 14 8
Philips Semiconductors Product specification
Base station LDMOS transistor BLF1049
List of components (see Figs 14 and 15)
COMPONENT DESCRIPTION VALUE DIMENSIONS
C1, C6, C13, C14, C15, C16, C17
C2 multilayer ceramic chip capacitor; note 1 330 nF C3 multilayer ceramic chip capacitor; note 1 100 nF C4, C9, C10, C11, C12 tantalum capacitor 10 µF C5, C18 air trimmer capacitor 5 pF C7, C8 multilayer ceramic chip capacitor 8.2 pF R1 potentiometer 1 k Q1 7808 voltage regulator Q2 BLF1049 LDMOS transistor L1 stripline; note 2 5.22 × 0.92 mm L2 stripline; note 2 6.47 × 0.92 mm L3 stripline; note 2 5.38 × 4.8 mm L4 stripline; note 2 2.4 × 0.92 mm L5 ferroxcube L6 stripline; note 2 9.73 × 0.92 mm L7 stripline; note 2 1.82 × 9.3 mm L8 stripline; note 2 8.15 × 17.9 mm L9 stripline; note 2 44 × 0.92 mm L10 stripline; note 2 18.45 × 28.3 mm L11 stripline; note 2 9.95 × 5.38 mm L12, L13 stripline; note 2 37.6 × 3.35 mm L14 stripline; note 2 2.36 × 0.92 mm L15, L16 stripline; note 2 4.22 × 0.92 mm
multilayer ceramic chip capacitor; note 1 68 pF
Notes
1. American Technical Ceramics type 100A or capacitor of same quality.
2. The striplines are on a double copper-clad Rogers 6006 printed-circuit board (ε
2003 May 14 9
= 6.15); thickness = 0.64 mm.
r
Philips Semiconductors Product specification
Base station LDMOS transistor BLF1049
PACKAGE OUTLINE
Flanged LDMOST ceramic package; 2 mounting holes; 2 leads SOT502A
D
A
3
D
1
U
1
q
1
H
U
2
A
2
b
w
M M
C
2
0 5 10 mm
scale
F
B
C
L
p
w
M MM
AB
1
c
E
1
Q
E
DIMENSIONS (millimetre dimensions are derived from the original inch dimensions)
UNIT
mm
inches
A
4.72
3.43
0.186
0.135
OUTLINE VERSION
SOT502A
12.83
12.57
0.505
0.495
c
Db
20.02
19.61
0.788
0.772
19.96
19.66
0.786
0.774
0.15
0.08
0.006
0.003
IEC JEDEC JEITA
D
1
EE
9.53
9.50
9.25
9.30
0.375
0.374
0.364
0.366
REFERENCES
1
1.14
0.89
0.045
0.035
F
H
19.94
18.92
0.785
0.210
0.745
0.170
2003 May 14 10
L
5.33
4.32
p
3.38
3.12
0.133
0.123
Q
1.70
1.45
0.067
0.057
qw
U
1
34.16
33.91
1.345
1.335
EUROPEAN
PROJECTION
w
U
2
9.91
9.65
0.390
0.380
0.25 0.5127.94
0.01 0.021.100
2
1
ISSUE DATE
99-12-28 03-01-10
Philips Semiconductors Product specification
Base station LDMOS transistor BLF1049
DATA SHEET STATUS
LEVEL
DATA SHEET
STATUS
(1)
PRODUCT
STATUS
(2)(3)
DEFINITION
I Objective data Development This data sheet contains data from the objective specification for product
development. Philips Semiconductors reserves the right to change the specification in any manner without notice.
II Preliminary data Qualification This data sheet contains data from the preliminary specification.
Supplementary data will be published at a later date. Philips Semiconductors reserves the right to change the specification without notice, in order to improve the design and supply the best possible product.
III Product data Production This data sheet contains data from the product specification. Philips
Semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. Relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN).
Notes
1. Please consult the most recently issued data sheet before initiating or completing a design.
2. The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com.
3. For datasheets describingmultipletype numbers,the highest-level productstatus determines thedata sheetstatus.
DEFINITIONS
DISCLAIMERS
Short-form specification The data in a short-form
specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook.
Limiting valuesdefinition  Limitingvalues givenare in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device atthese orat anyother conditionsabovethose givenin the Characteristics sectionsof the specification isnot implied. Exposure to limiting values for extended periods may affect device reliability.
Application information  Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make norepresentation orwarrantythat suchapplications willbe suitable for the specified use without further testing or modification.
Life support applications  These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably beexpected toresult inpersonal injury.Philips Semiconductorscustomers usingorselling theseproducts for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application.
Right to make changes  Philips Semiconductors reserves the right to make changes in the products ­including circuits, standard cells, and/or software ­described or contained herein in order to improve design and/or performance.When theproduct is infull production (status ‘Production’), relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). Philips Semiconductorsassumes no responsibility or liability for the use of any of these products, conveys no licence or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified.
2003 May 14 11
Philips Semiconductors – a w orldwide compan y
Contact information
For additional information please visit http://www.semiconductors.philips.com. Fax: +31 40 27 24825 For sales offices addresses send e-mail to: sales.addresses@www.semiconductors.philips.com.
© Koninklijke Philips Electronics N.V. 2003 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.
The information presented in this document doesnot formpart of any quotation or contract, isbelieved tobe accurate and reliable and may bechanged without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights.
Printed in The Netherlands 613524/03/pp12 Date of release: 2003 May 14 Document order number: 9397750 11123
SCA75
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