Philips 74LVT646PW, 74LVT646DB, 74LVT646D Datasheet

INTEGRATED CIRCUITS

74LVT646

3.3V Octal bus transceiver/register
(3-State)

Product specification
Supersedes data of 1994 May 20
IC23 Data Handbook

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1998 Feb 19

Philips Semiconductors Product specification

74L VT6463.3V Octal bus transceiver/register (3-State)

FEA TURES

•Combines 74L VT245 and 74LVT574 type functions in one device

•Independent registers for A and B buses

•Multiplexed real–time and stored data

•Output capability: +64mA/–32mA

•TTL input and output switching levels

•Input and output interface capability to systems at 5V supply

•Bus-hold data inputs eliminate the need for external pull-up

resistors to hold unused inputs

•Live insertion/extraction permitted

•No bus current loading when output is tied to 5V bus

•Latch-up protection exceeds 500mA per JEDEC Std 17

•Power-up 3-State

•Power-up reset

•ESD protection exceeds 2000V per MIL STD 883 Method 3015

and 200V per Machine Model

QUICK REFERENCE DATA

SYMBOL PARAMETER

t

PLH

t

PHL

C

C
I

CCZ

IN

I/O

Propagation delay
An to Bn or Bn to An

Input capacitance
CP, S, OE, DIR

I/O capacitance Outputs disabled; V
Total supply current Outputs disabled; VCC = 3.6V 0.13 mA

DESCRIPTION

The LVT646 is a high-performance BiCMOS product designed for
V

operation at 3.3V .

CC

This device consists of bus transceiver circuits with 3-State outputs,
D-type flip-flops, and control circuitry arranged for multiplexed
transmission of data directly from the input bus or the internal
registers.

Data on the A or B bus will be clocked into the registers as the
appropriate clock pin goes High.

Output Enable (OE
transceiver function. In the transceiver mode, data present at the
high impedance port may be stored in either the A or B register or
both.

The Select (SAB, SBA) pins determine whether data is stored or
transferred through the device in real–time. The DIR determines
which bus will receive data when the OE

In the isolation mode (OE
the B register and/or data from Bus B may be stored in the A
register.

When an output function is disabled, the input function is still
enabled and may be used to store and transmit data. Only one of
the two buses, A or B may be driven at a time. The examples on the
next page demonstrate the four fundamental bus management
functions that can be performed with the 74LVT646.

CONDITIONS

T

= 25°C; GND = 0V

amb

CL = 50pF; VCC = 3.3V

V

= 0V or 3.0V 4 pF

I/O

) and DIR pins are provided to control the

is active (Low).

= High), data from Bus A may be stored in

TYPICAL UNIT

2.8

2.7

= 0V or 3.0V 10 pF

I/O

ns

ORDERING INFORMATION

PACKAGES TEMPERATURE RANGE OUTSIDE NORTH AMERICA NORTH AMERICA DWG NUMBER

24-Pin Plastic SOL –40°C to +85°C 74LVT646 D 74LVT646 D SOT163-1
24-Pin Plastic SSOP Type II –40°C to +85°C 74LVT646 DB 74LVT646 DB SOT399-1
24-Pin Plastic TSSOP Type I –40°C to +85°C 74LVT646 PW 74LVT646PW DH SOT360-1

PIN CONFIGURATION

1

CPAB

2

SAB

3

DIR

4

A0

5

A1

6

A2

7

A3

8

A4

9

A5

10

A6

11

A7

12

GND

24
23
22
21
20
19
18
17
16
15
14
13

SV00045

V

CC

CPBA
SBA
OE
B0
B1
B2
B3
B4
B5
B6
B7

PIN DESCRIPTION

PIN NUMBER SYMBOL FUNCTION

1, 23

CPAB /

CPBA

2, 22 SAB / SBA

3 DIR Direction control input

4, 5, 6, 7, 8, 9, 10,

11

20, 19, 18, 17, 16,

15, 14, 13

A0 – A7

B0 – B7

21 OE
12 GND Ground (0V)

24 V

CC

A to B clock input / B to A
clock input

A to B select input / B to
A select input

Data inputs/outputs (A
side)

Data inputs/outputs (B
side)

Output enable input
(active-low)

Positive supply voltage

1998 Feb 19 853-1747 18987

2

Philips Semiconductors Product specification

74LVT6463.3V Octal bus transceiver/register (3-State)

LOGIC SYMBOL

3
23
22 SBA
21 OE

LOGIC DIAGRAM

4567891011

A0 A1 A2 A3 A4 A5 A6 A7

CPAB1
SAB2

DIR
CPBA

B0 B1 B2 B3 B4 B5 B6 B7

20 19 18 17 16 15 14 13

SV00046

LOGIC SYMBOL (IEEE/IEC)

21

3
23
22

1

2

4

5
6
7

8
9

10

11

G3
3EN1 [BA]
3EN2 [AB]
C4

G5
C6
G7

≥1

∇1

6D 7
17

54D
5

1

≥1

2∇

20

19

18

17

16

15

14

13

SV00047

OE

DIR

CPBA

SBA

CPAB

SAB

21

3
23
22

1

2

1of 8 Channels

4

A0

1D

C1

Q

5

A1

6

A2

7

A3

8

A4

9

A5

10

A6

11

A7

DETAIL A X 7

1D

C1

Q

20

B0

19

B1

18

B2

17

B3

16

B4

15

B5

14

B6

13

B7

1998 Feb 19

SV00048

3

Philips Semiconductors Product specification

OPERATING MODE

74LVT6463.3V Octal bus transceiver/register (3-State)

REAL TIME BUS TRANSFER

BUS B TO BUS A

A

B

}

OE DIR CPAB CPBA SAB SBA

LLXXXL

REAL TIME BUS TRANSFER

BUS A TO BUS B

A A A

B B B

STORAGE FROM

A, B, OR A AND B

}

OE DIR CPAB CPBA SAB SBA

LHXXLX

OE DIR CPAB CPBA SAB SBA

LH↑ XXX
LLX↑ XX
HX↑↑XX

FUNCTION TABLE

INPUTS DATA I/O

OE DIR CPAB CPBA SAB SBA An Bn

X X ↑ X X X Input

X
X

L
H

X
X

Unspecified

output*

Input Input

Output Input

Input Output

X X X ↑ X X
H

H
L

L
L

L

H = High voltage level
L = Low voltage level
X = Don’t care
↑ = Low-to-High clock transition
* The data output function may be enabled or disabled by various signals at the OE

data at the bus pins will be stored on every Low-to-High transition of the clock.

X
X

L
L

H
H

↑

H or L

X
X

X

H or L

↑

H or L

X

H or L

X
X

X
X

X
X

L
H

Unspecified

output*

Input Store B, A unspecified

TRANSFER STORED DA TA

}

Store A, B unspecified

Store A and B data
Isolation, hold storage

Real time B data to A bus
Stored B data to A bus

Real time A data to B bus
Stored A data to B bus

input. Data input functions are always enabled, i.e.,

TO A OR B

}

OE DIR CPAB CPBA SAB SBA

L L X H or L X H
L H H or L X H X

SV00049

1998 Feb 19

4

Philips Semiconductors Product specification

I

DC output current

mA

SYMBOL

PARAMETER

UNIT

I

mA

74LVT6463.3V Octal bus transceiver/register (3-State)

ABSOLUTE MAXIMUM RATINGS

SYMBOL

V

CC

I

IK

V

I

I

OK

V

OUT

DC supply voltage –0.5 to +4.6 V
DC input diode current VI < 0 –50 mA
DC input voltage
DC output diode current VO < 0 –50 mA
DC output voltage

PARAMETER CONDITIONS RATING UNIT

3

3

1, 2

–0.5 to +7.0 V

Output in Off or High state –0.5 to +7.0 V

Output in Low state 128

OUT

T

stg

p

Output in High state –64

Storage temperature range –65 to 150 °C

NOTES:

1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the
device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability .

2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction
temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150°C.

3. The input and output negative voltage ratings may be exceeded if the input and output clamp current ratings are observed.

RECOMMENDED OPERATING CONDITIONS

LIMITS

MIN MAX

V

CC

V

V

V

I

OH

OL

∆t/∆v Input transition rise or fall rate; Outputs enabled 10 ns/V

T

amb

DC supply voltage 2.7 3.6 V
Input voltage 0 5.5 V

I

High-level input voltage 2.0 V

IH

Input voltage 0.8 V

IL

High-level output current –32 mA
Low-level output current 32
Low-level output current; current duty cycle ≤ 50%, f ≥ 1kHz 64

Operating free-air temperature range –40 +85 °C

1998 Feb 19

5