Philips 74LVT543PW, 74LVT543DB, 74LVT543D Datasheet

INTEGRATED CIRCUITS

74LVT543

3.3V Octal latched transceiver with
dual enable (3-State)

Product specification
Supersedes data of 1994 May 20
IC23 Data Handbook

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1998 Feb 19

Philips Semiconductors Product specification

3.3V Octal latched transceiver with dual enable
(3-State)

FEA TURES

•Combines 74L VT245 and 74LVT373 type functions in one device

•8-bit octal transceiver with D-type latch

•Back-to-back registers for storage

•Separate controls for data flow in each direction

•Output capability: +64mA/–32mA

•TTL input and output switching levels

•Input and output interface capability to systems at 5V supply

•Bus-hold data inputs eliminate the need for external pull-up

resistors to hold unused inputs

•Live insertion/extraction permitted

•No bus current loading when output is tied to 5V bus

•Power-up 3-State

•Power-up reset

•Latch-up protection exceeds 500mA per JEDEC Std 17

•ESD protection exceeds 2000V per MIL STD 883 Method 3015

and 200V per Machine Model

DESCRIPTION

The 74LVT543 is a high-performance BiCMOS product designed for
V

operation at 3.3V .

CC

This device contains two sets of D-type latches for temporary
storage of data flowing in either direction. Separate Latch Enable
(LEAB

, LEBA) and Output Enable (OEAB, OEBA) inputs are
provided for each register to permit independent control of data
transfer in either direction. The outputs are guaranteed to sink
64mA.

FUNCTIONAL DESCRIPTION

The 74LVT543 contains two sets of eight D–type latches, with
separate control pins for each set. Using data flow from A to B as an
example, when the A-to-B Enable (EAB
Enable (LEAB
subsequent Low-to-High transition of the LEAB
data into the latches where it is stored and the B outputs no longer
change with the A inputs. With EAB
3-State B output buffers are active and display the data present at
the outputs of the A latches.

Control of data flow from B to A is similar, but using the EBA
and OEBA

74L VT543

) input and the A-to-B Latch

) input are Low the A-to-B path is transparent. A

signal puts the A

and OEAB both Low, the

, LEBA,

inputs.

QUICK REFERENCE DATA

SYMBOL PARAMETER

t

PLH

t

PHL

C
C
I

CCZ

IN

I/O

Propagation delay
An to Bn or Bn to An

Input capacitance VI = 0V or 3.0V 4 pF
I/O capacitance Outputs disabled; V
Total supply current Outputs disabled; VCC = 3.6V 0.13 mA

CL = 50pF;
VCC = 3.3V

CONDITIONS

T

= 25°C; GND = 0V

amb

I/O

TYPICAL UNIT

2.3

3.0

= 0V or 3.0V 10 pF

ORDERING INFORMATION

PACKAGES TEMPERATURE RANGE OUTSIDE NORTH AMERICA NORTH AMERICA DWG NUMBER

24-Pin Plastic SOL –40°C to +85°C 74LVT543 D 74LVT543 D SOT137-1
24-Pin Plastic SSOP Type II –40°C to +85°C 74LVT543 DB 74LVT543 DB SOT340-1
24-Pin Plastic TSSOP Type I –40°C to +85°C 74LVT543 PW 74LVT543PW DH SOT355-1

PIN CONFIGURATION

1

LEBA

2

OEBA

3

A0

4

A1

5

A2

6

A3

7

A4

8

A5

9

A6

10 15

A7

11

EAB

12 13

GND

24

V

23

EBA

22

B0

21

B1

20

B2

19

B3

18

B4

17

B5

16

B6
B7

14

LEAB
OEAB

SV00026

CC

LOGIC SYMBOL

11
23
14 LEAB

1 LEBA

3456

A0 A1 A2 A3
EAB

EBA

B0 B1 B2

B3

2122

1920

78910

A4 A5 A6 A7

B4 B5 B6

B7

1718

1516

13OEAB
2OEBA

SV00027

ns

1998 Feb 19 853-1749 18988

2

Philips Semiconductors Product specification

STATUS

3.3V Octal latched transceiver with dual enable
(3-State)

LOGIC SYMBOL (IEEE/IEC)

2

1EN3

23

G1

1

IC5

13

ZEN4 (AB)

11

GZ.

14

ZC6

3 22

V3 5D

6D

421

520

619

718

817

916

10 15

2V

SV00028

LOGIC DIAGRAM

OEBA

EBA

LEBA

74LVT543

DETAIL A

DLEQ

3

A0

4

A1

5

A2

6

A3

7

A4

8

A5

9

A6

10

A7

2

23

1

DETAIL A X 7

D

Q

LE

22

B0

21

B1

20

B2

19

B3

18

B4

17

B5

16

B6

15

B7

13

OEAB

11

EAB

14

LEAB

SV00029

PIN DESCRIPTION

PIN NUMBER SYMBOL FUNCTION

14, 1 LEAB / LEBA A to B / B to A Latch Enable input (active-Low)

11, 23 EAB / EBA A to B / B to A Enable input (active-Low)

13, 2 OEAB / OEBA A to B / B to A Output Enable input (active-Low)

3, 4, 5, 6, 7, 8, 9, 10 A0 – A7 Port A, 3-State outputs

22, 21, 20, 19, 18, 17, 16, 15 B0 – B7 Port B, 3-State outputs

12 GND Ground (0V)
24 V

CC

Positive supply voltage

FUNCTION TABLE

INPUTS OUTPUTS

OEXX EXX LEXX An or Bn Bn or An

H X X X Z Disabled
X H X X Z Disabled

L
L

L
L

L
L

L L H X NC Hold

H = High voltage level
h = High voltage level one set-up time prior to the Low-to-High

transition of LEXX
L = Low voltage level
l = Low voltage level one set-up time prior to the Low-to-High

transition of LEXX or EXX (XX = AB or BA)

↑
↑

L
L

L
L

L
L

↑
↑

L
L

or EXX (XX = AB or BA)

h

l

h

l

H

L

Z
Z

H

L

H

L

X = Don’t care
↑ = Low-to-High transition of LEXX
NC= No change
Z = High impedance or “off” state

Disabled + Latch

Latch + Display

Transparent

or EXX (XX = AB or BA)

1998 Feb 19

3

Philips Semiconductors Product specification

I

DC output current

mA

SYMBOL

PARAMETER

UNIT

I

mA

3.3V Octal latched transceiver with dual enable
(3-State)

ABSOLUTE MAXIMUM RATINGS

SYMBOL

V

V

I
V

I

OK

OUT

OUT

T

CC

IK

stg

DC supply voltage –0.5 to +4.6 V
DC input diode current VI < 0 –50 mA
DC input voltage

I

DC output diode current VO < 0 –50 mA
DC output voltage

p

Storage temperature range –65 to 150 °C

NOTES:

1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the

device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability .

2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create ju nction

temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150°C.

3. The input and output negative voltage ratings may be exceeded if the input and output clamp current ratings are observed.

PARAMETER CONDITIONS RATING UNIT

3

3

1, 2

–0.5 to +7.0 V

Output in Off or High state –0.5 to +7.0 V

Output in Low state 128

Output in High state –64

74LVT543

RECOMMENDED OPERATING CONDITIONS

LIMITS

MIN MAX

V

CC

V
V
V
I

OH

OL

∆t/∆v Input transition rise or fall rate; outputs enabled 10 ns/V

T

amb

DC supply voltage 2.7 3.6 V
Input voltage 0 5.5 V

I

High-level input voltage 2.0 V

IH

Low-level input voltage 0.8 V

IL

High-level output current –32 mA
Low-level output current 32
Low-level output current; current duty cycle ≤ 50%; f ≥ 1kHz 64

Operating free-air temperature range –40 +85 °C

1998 Feb 19

4