Philips 74LVT16543ADGG Datasheet
INTEGRATED CIRCUITS
74LVT16543A
3.3V LVT 16-bit registered transceiver
(3-State)
Product specification
Supersedes data of 19
IC23 Data Handbook
1998 Feb 19
Philips Semiconductors Product specification
74LVT16543A3.3V 16-bit registered transceiver (3-State)
FEA TURES
•16-bit universal bus interface
•3-State buffers
•Output capability: +64mA/-32mA
•TTL input and output switching levels
•Input and output interface capability to systems at 5V supply
•Bus-hold data inputs eliminate the need for external pull-up
resistors to hold unused inputs
•Live insertion/extraction permitted
•Power-up 3-State
•Power-up reset
•No bus current loading when output is tied to 5V bus
•Latch-up protection exceeds 500mA per JEDEC Std 17
•ESD protection exceeds 2000V per MIL STD 883 Method 3015
and 200V per Machine Model
QUICK REFERENCE DATA
SYMBOL PARAMETER
t
PLH
t
PHL
C
C
I
CCZ
Propagation delay
nAx to nBx or nBx to nAx
Input capacitance control pins VI = 0V or 3.0V 3 pF
IN
I/O pin capacitance Outputs disabled; V
I/O
Total supply current Outputs disabled; VCC = 3.6V 70 µA
CL = 50pF;
VCC = 3.3V
DESCRIPTION
The 74LVT16543A is a high-performance BiCMOS product
designed for V
8-bit transceivers or one 16-bit transceiver.
The 74LVT16543A contains two sets of eight D-type latches, with
separate control pins for each set. Using data flow from A to B as an
example, when the A-to-B Enable (nEAB
Enable (nLEAB
A subsequent Low-to-High transition of the nLEAB
data into the latches where it is stored and the B outputs no longer
change with the A inputs. With nEAB
3-State B output buffers are active and display the data present at
the outputs of the A latches.
Control of data flow from B to A is similar, but using the nEBA
, and nOEBA inputs.
nLEBA
Active bus-hold circuitry is provided to hold unused or floating data
inputs at a valid logic level.
CONDITIONS
T
= 25°C; GND = 0V
amb
operation at 3.3V. The device can be used as two
CC
) input and the A-to-B Latch
) input are Low, the A-to-B path is transparent.
signal puts the A
and nOEAB both Low, the
TYPICAL UNIT
2.2 ns
= 0V or 3.0V 9 pF
I/O
,
ORDERING INFORMATION
PACKAGES TEMPERATURE RANGE OUTSIDE NORTH AMERICA NORTH AMERICA DWG NUMBER
56-Pin Plastic SSOP Type III –40°C to +85°C 74LVT16543A DL VT16543A DL SOT371-1
56-Pin Plastic TSSOP Type II –40°C to +85°C 74LVT16543A DGG VT16543A DGG SOT364-1
LOGIC SYMBOL (IEEE/IEC)
56
54
55
1
3
2
5
6
8
9
10
12
13
14
1EN3 (BA)
G1
1C5
2EN4 (AB)
G2
2C6
∇ 3
6 D
5 D
4 ∇
29
31
30
28
26
27
52
15
51
16
49
17
48
19
47
20
45
21
44
23
43
24
7EN9 (BA)
G7
7C11
8EN10 (AB)
G8
8C12
∇ 9 11 D
12 D 10 ∇
42
41
40
38
37
36
34
33
SW00151
1998 Feb 19 853–1764 18986
2
Philips Semiconductors Product specification
74LVT16543A3.3V 16-bit registered transceiver (3-State)
PIN CONFIGURATION
1
1OEAB
2
1LEAB
1EAB
3
GND
4
1A0
5
6
1A1
7
V
CC
8
1A2
1A3
9
1A4
10
GND
11
1A5
12
1A6
13
1A7
14
2A0
15
16
2A1
2A2
17
GND
18
2A3
19
20
2A4
21
2A5
22
V
CC
23
2A6
24
2A7
GND
25
26
2EAB
27
2LEAB
28
2OEAB
SH00037
LOGIC SYMBOL
56
1OEBA
55
1LEBA
1EBA
54
GND
53
1B0
52
51
1B1
50
V
CC
49
1B2
1B3
48
1B4
47
GND
46
1B5
45
1B6
44
1B7
43
2B0
42
41
2B1
2B2
40
GND
39
2B3
38
37
2B4
36
2B5
35
V
CC
34
2B6
33
2B7
GND
32
31
2EBA
30
2LEBA
29
2OEBA
3
54
2 1LEAB
55 1LEBA
26
31
27 2LEAB
30 2LEBA
5 6 10 12 13 1489
1A0 1A1 1A2 1A3 1A4 1A5 1A6 1A7
1EAB
1EBA
1B0 1B1 1B2 1B3 1B4 1B5 1B6 1B7
52 51 47 45 44 4349 48
15 16 20 21 23 2417 19
2A0 2A1 2A2 2A3 2A4 2A5 2A6 2A7
2EAB
2EBA
2B0 2B1 2B2 2B3 2B4 2B5 2B6 2B7
42 41 37 36 34 3340 38
11OEAB
561OEBA
282OEAB
292OEBA
SH00038
PIN DESCRIPTION
PIN NUMBER SYMBOL NAME AND FUNCTION
5, 6, 8, 9, 10, 12, 13, 14
15, 16, 17, 19, 20, 21, 23, 24
52, 51, 49, 48, 47, 45, 44, 43
42, 41, 40,38, 37, 36, 34, 33
1, 56
28, 29
3, 54
26, 31
2, 55
27, 30
4, 11, 18, 25, 32, 39, 46, 53 GND Ground (0V)
7, 22, 35, 50 V
1998 Feb 19
1A0 – 1A7,
2A0 – 2A7
1B0 – 1B7,
2B0 – 2B7
1OEAB, 1OEBA,
2OEAB, 2OEBA
1EAB, 1EBA,
2EAB, 2EBA
1LEAB, 1LEBA,
2LEAB, 2LEBA
CC
3
A Data inputs/outputs
B Data inputs/outputs
A to B / B to A Output Enable inputs (active-Low)
A to B / B to A Enable inputs (active-Low)
A to B / B to A Latch Enable inputs (active-Low)
Positive supply voltage
Philips Semiconductors Product specification
STATUS
74LVT16543A3.3V 16-bit registered transceiver (3-State)
LOGIC DIAGRAM
DETAIL A
D
Q
LE
nB0
nA0
nOEBA
nEBA
nLEBA
DETAIL A X 7
D
Q
LE
nB1nA1
nB2nA2
nB3nA3
nB4nA4
nB5nA5
nB6nA6
nB7nA7
nOEAB
nEAB
nLEAB
SH00039
FUNCTION TABLE
INPUTS OUTPUTS
nOEXX nEXX nLEXX nAx or nBx nBx or nAx
H X X X Z Disabled
X H X X Z Disabled
L
L
L
L
L
L
L L H X NC Hold
H = High voltage level
h = High voltage level one set-up time prior to the Low-to-High transition of nLEXX
L = Low voltage level
l = Low voltage level one set-up time prior to the Low-to-High transition of nLEXX
X = Don’t care
↑ = Low-to-High transition of nLEXX
NC= No change
Z = High impedance or “off” state
1998 Feb 19
↑
↑
L
L
L
L
L
L
↑
↑
L
L
h
l
h
l
H
L
or nEXX (XX = AB or BA)
4
Z
Z
H
L
H
L
Disabled + Latch
Latch + Display
Transparent
or nEXX (XX = AB or BA)
or nEXX (XX = AB or BA)
Loading...