Philips 74LVT16244BDL, 74LVT16244BDGG, 74LVT16244B-1DL, 74LVT16244B-1DGG Datasheet

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74LVT16244B
3.3V LVT 16-bit buffer/driver (3-State)
Prooduct specification Supersedes data of 1998 Feb 19 IC23 Data Handbook
1998 Oct 07
Philips Semiconductors Product specification
74L VT16244B3.3V 16-bit buffer/driver (3-State)
2
1998 Oct 07 853-1778 20144
FEA TURES
16-bit bus interface
3-State buffers
Output capability: +64mA/-32mA
TTL input and output switching levels
Input and output interface capability to systems at 5V supply
Bus-hold data inputs eliminate the need for external pull-up
resistors to hold unused inputs
Live insertion/extraction permitted
Power-up 3-State
No bus current loading when output is tied to 5V bus
Latch-up protection exceeds 500mA per JEDEC Std 17
ESD protection exceeds 2000V per MIL STD 883 Method 3015
and 200V per Machine Model
DESCRIPTION
The 74LVT16244B is a high-performance BiCMOS product designed for V
CC
operation at 3.3V .
This device is a 16-bit buffer and line driver featuring non-inverting 3-State bus outputs. The device can be used as four 4-bit buffers, two 8-bit buffers, or one 16-bit buffer.
QUICK REFERENCE DA TA
SYMBOL PARAMETER
CONDITIONS
T
amb
= 25°C
TYPICAL UNIT
t
PLH
t
PHL
Propagation delay nAx to nYx
CL = 50pF; V
CC
= 3.3V
1.8 ns
C
IN
Input capacitance nOE VI = 0V or 3.0V 3 pF
C
OUT
Output capacitance Outputs disabled; VO = 0V or 3.0V 9 pF
I
CCZ
Total supply current Outputs disabled; VCC = 3.6V 70 µA
ORDERING INFORMATION
PACKAGES TEMPERATURE RANGE OUTSIDE NORTH AMERICA NORTH AMERICA DWG NUMBER
48-Pin Plastic SSOP Type III –40°C to +85°C 74LVT16244B DL VT16244B DL SOT370-1 48-Pin Plastic TSSOP Type II –40°C to +85°C 74LVT16244B DGG VT16244B DGG SOT362-1
LOGIC SYMBOL
1OE
1
1A0
47
1A1
46
1A2
44
1A3
43
2OE
48
2A0
41
2A1
2
40
2A2
38
3
2A3
37
5
6
1Y0
1Y1
1Y2
1Y3
2Y0
2Y1
2Y2
2Y3
8
9
11
12
3OE
25
3A0
36
3A1
35
3A2
33
3A3
32
4OE
24
4A0
30
4A1
13
29
4A2
27
14
4A3
26
16
17
3Y0
3Y1
3Y2
3Y3
4Y0
4Y1
4Y2
4Y3
19
20
22
23
SA00014
Philips Semiconductors Product specification
74LVT16244B3.3V 16-bit buffer/driver (3-State)
1998 Oct 07
3
LOGIC SYMBOL (IEEE/IEC)
48
EN1
1
46 44 43 41 40 38 37 36
EN2 EN3 EN4
1
2 1
3 1
4 1
1
25 24
47
35 33 32 30
29 27 26
3
2
5 6 8 9
11 12 13 14 16 17 19 20 22 23
SA00019
1OE 2OE 3OE 4OE
1A1 1A2 1A3 1A4 2A1 2A2 2A3
3A1 3A2 3A3 3A4 4A1 4A2 4A3 4A4
1Y1 1Y2 1Y3 1Y4 2Y1 2Y2 2Y3 2Y4 3Y1
3Y2 3Y3 3Y4 4Y1
4Y4
2A4
4Y2 4Y3
PIN CONFIGURATION
1 2 3 4 5 6 7 8
9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24
48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25
1OE
1Y0 1Y1
GND
1Y2 1Y3
2Y0 2Y1
GND
2Y2 2Y3 3Y0 3Y1
GND
3Y4
V
CC
4Y0
V
CC
3Y2
4Y1
GND
4Y3
4OE
4Y2
2OE 1A0 1A1 GND 1A2 1A3
2A0 2A1 GND 2A2 2A3 3A0 3A1 GND
3A3 V
CC
4A0
V
CC
3A2
4A1 GND
4A3 3OE
4A2
SA00013
PIN DESCRIPTION
PIN NUMBER SYMBOL NAME AND FUNCTION
47, 46, 44, 43 41, 40, 38, 37 36, 35, 33, 32 30, 29, 27, 26
1A0 - 1A3, 2A0 - 2A3, 3A0 - 3A3,
4A0 - 4A3
Data inputs
2, 3, 5, 6
8, 9, 11, 12 13, 14, 16, 17 19, 20, 22, 23
1Y0 - 1Y3, 2Y0 - 2Y3, 3Y0 - 3Y3,
4Y0 - 4Y3
Data outputs
1, 48
25, 24
1OE, 2OE, 3OE, 4OE
Output enables
4, 10, 15, 21
28, 34, 39, 45
GND Ground (0V)
7, 18, 31, 42 V
CC
Positive supply voltage
FUNCTION TABLE
INPUTS OUTPUTS
nOE nAx nYx
L L L L H H
H X Z
H = High voltage level L = Low voltage level X = Don’t care Z = High Impedance “off” state
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