Philips 74lvt126 DATASHEETS

INTEGRATED CIRCUITS

74LVT126

3.3V Quad buffer (3-State)

Product specification Supersedes data of 1995 Dec 21 IC23 Data Handbook

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1998 Feb 19

Philips Semiconductors Product specification

74L VT1263.3V Quad buffer (3-State)

FEA TURES

•Quad bus interface

•3-State buffers

•Output capability: +64mA/-32mA

•TTL input and output switching levels

•Input and output interface capability to systems at 5V supply

•Bus-hold data inputs eliminate the need for external pull-up

resistors to hold unused inputs

•Live insertion/extraction permitted

•No bus current loading when output is tied to 5V bus

•Power-up 3-State

•Latch-up protection exceeds 500mA per JEDEC Std 17

•ESD protection exceeds 2000V per MIL STD 883 Method 3015

and 200V per Machine Model

QUICK REFERENCE DATA

SYMBOL PARAMETER

PLH

PHL

OUT

CCZ

Propagation delay An to Yn

CL = 50pF; VCC = 3.3V

Input capacitance VI = 0V or V Output capacitance Outputs disabled; VO = 0V or 3.0V 8 pF Total supply current Outputs disabled; VCC = 3.6V 0.13 mA

DESCRIPTION

The LVT126 is a high-performance BiCMOS product designed for V

operation at 3.3V .

This device combines low static and dynamic power dissipation with high speed and high output drive.

The 74LVT126 device is a quad buffer that is ideal for driving bus lines. The device features four Output Enables (OE0, OE1, OE2, OE3), each controlling one of the 3-State outputs.

CONDITIONS

= 25°C; GND = 0V

amb

TYPICAL UNIT

2.3

2.4 4 pF

ORDERING INFORMATION

PACKAGES TEMPERATURE RANGE OUTSIDE NORTH AMERICA NORTH AMERICA DWG NUMBER

14-Pin Plastic SO –40°C to +85°C 74LVT126 D 74LVT126 D SOT108-1 14-Pin Plastic SSOP –40°C to +85°C 74LVT126 DB 74LVT126 DB SOT337-1 14-Pin Plastic TSSOP –40°C to +85°C 74LVT126 PW 74LVT126PW DH SOT402-1

PIN DESCRIPTION

PIN NUMBER SYMBOL NAME AND FUNCTION

2, 5, 9, 12 A0 – A3 Data inputs 3, 6, 8, 11 Y0 – Y3 Data outputs

1, 4, 10, 13 OE0 – OE3 Output enable inputs

7 GND Ground (0V)

14 V

PIN CONFIGURATION

OE0

OE1

GND Y2

V OE3

OE2

SA00031

Positive supply voltage

LOGIC SYMBOL

OE0

OE1

OE2

OE3

SV00093

1998 Feb 19 853-1822 18991

Philips Semiconductors Product specification

DC output current

74LVT1263.3V Quad buffer (3-State)

LOGIC SYMBOL (IEEE/IEC)

FUNCTION TABLE

INPUTS OUTPUTS

2 4 5

9 13 12

ABSOLUTE MAXIMUM RATINGS

SYMBOL

OUT

stg

DC supply voltage –0.5 to +4.6 V DC input voltage DC output voltage

DC input diode current VI < 0 –50 mA DC output diode current VO < 0 –50 mA Storage temperature range –65 to 150 °C

PARAMETER CONDITIONS RATING UNIT

SV00134

1, 2

H =High voltage level L =Low voltage level X = Don’t care Z =High impedance ”off” state

Output in Off or High state –0.5 to +7.0 V

Output in Low state 128 mA

Out in High State –64 mA

OEn An Yn

H L L H H H

L X Z

–0.5 to +7.0 V

NOTES:

1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability .

2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150°C.

3. The input and output negative voltage ratings may be exceeded if the input and output clamp current ratings are observed.

RECOMMENDED OPERATING CONDITIONS

SYMBOL PARAMETER LIMITS UNIT

1998 Feb 19

MIN MAX

DC supply voltage 2.7 3.6 V Input voltage 0 5.5 V

High-level input voltage 2.0 V

Low-level input voltage 0.8 V

High-level output current –32 mA Low-level output current 32

Low-level output current; current duty cycle ≤ 50%, f ≥ 1kHz 64

∆t/∆v Input transition rise or fall rate; outputs enabled 10 ns/V

amb

Operating free-air temperature range –40 +85 °C

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