Philips 74lvc lvch32245a DATASHEETS
INTEGRATED CIRCUITS
DATA SH EET
74LVC32245A; 74LVCH32245A
32-bit bus transceiver with direction
pin; 5 V tolerant; 3-state
Product specification
File under Integrated Circuits, IC24
1999 Sep 01
Philips Semiconductors Product specification
32-bit bus transceiver withdirectionpin;
5 V tolerant; 3-state
FEATURES
• 5 V tolerant inputs/outputs for interfacing with 5 V logic
• Wide supply voltage range of 1.2 to 3.6 V
• Complies with JEDEC standard no. 8-1A
• CMOS low power consumption
• MULTIBYTE flow-trough standardpin-out architecture
• Low inductance multiple power and ground pins for
minimum noise and ground bounce
• Direct interface with TTL levels
• Bus hold on data inputs (74LVCH32245A only)
• Typical output ground bounce voltage:
V
<0.8VatVCC= 3.3 V; T
OLP
• Typical output VOH undershoot voltage:
V
>2VatVCC= 3.3 V; T
OHV
• Power-off disabled outputs, permitting live insertion
• Plastic fine-pitch ball grid array package.
amb
amb
=25°C
=25°C
74LVC32245A;
74LVCH32245A
DESCRIPTION
The 74LVC(H)32245A is a high-performance, low-power,
low-voltage, Si-gate CMOS device, superior to most
advanced CMOS compatible TTL families. Inputs can be
driven from either 3.3 or 5 V devices. In 3-state operation,
outputs can handle 5 V. These features allow the use of
these devices in a mixed 3.3 and 5 V environment.
The 74LVC(H)32245A is a 32-bit transceiver featuring
non-inverting 3-state bus compatible outputs in both send
andreceivedirections.The74LVC(H)32245Afeaturestwo
output enable (nOE) inputs for easy cascading and two
send or receive (nDIR) inputs for direction control. nOE
controls the outputs so that the buses are effectively
isolated.
To ensure the high-impedance state during power-up or
power-down, input nOE should be tied to VCC through a
pull-up resistor; the minimum value of the resistor is
determined by the current-sinking capability of the driver.
The 74LVCH32245A bus hold data inputs eliminates the
need for external pull-up resistors to hold unused or
floating data inputs at a valid logic level (see Fig.2).
QUICK REFERENCE DATA
Ground = 0 V; T
=25°C; tr=tf≤2.5 ns.
amb
SYMBOL PARAMETER CONDITIONS TYPICAL UNIT
t
PHL/tPLH
C
I
C
I/O
C
PD
propagation delay
nAnto nBn;nBnto nA
n
CL= 50 pF; VCC= 3.3 V 3.0 ns
input capacitance 5.0 pF
input/output capacitance 10 pF
power dissipation capacitance per
VI= GND to VCC; note 1 30 pF
buffer
Note
1. C
is used to determine the dynamic power dissipation (PDin µW).
PD
PD=CPD× V
= input frequency in MHz;
f
i
2
× fi+ Σ(CL× V
CC
2
× fo) where:
CC
fo= output frequency in MHz;
CL= output load capacitance in pF;
VCC= supply voltage in Volts;
Σ(CL× V
2
× fo) = sum of the outputs.
CC
1999 Sep 01 2
Philips Semiconductors Product specification
32-bit bus transceiver with direction pin;
5 V tolerant; 3-state
FUNCTION TABLE
See note 1.
INPUT OUTPUT
n
OE nDIR nA
L L A = B inputs
L H inputs B = A
HXZZ
Note
1. H = HIGH voltage level;
L = LOW voltage level;
X = don’t care;
Z = high-impedance OFF-state.
ORDERING INFORMATION
TYPE NUMBER
TEMPERATURE RANGE PINS PACKAGE MATERIAL CODE
74LVC32245AEC −40 to +85 °C 96 LFBGA96 plastic SOT536-1
74LVCH32245AEC 96 LFBGA96 plastic SOT536-1
n
PACKAGES
74LVC32245A;
74LVCH32245A
nB
n
PINNING
SYMBOL DESCRIPTION
nDIR direction control
n
OE output enable input (active LOW)
nA
n
nB
n
GND ground (0 V)
V
CC
data inputs/outputs
data inputs/outputs
DC supply voltage
1999 Sep 01 3
Philips Semiconductors Product specification
32-bit bus transceiver with direction pin;
5 V tolerant; 3-state
handbook, full pagewidth
6
1A11A31A51A72A12A32A52A63A13A33A53A74A14A34A54A
5
1A01A21A41A62A02A22A42A73A03A23A43A64A04A24A44A
1OE 2OE 3OEGND GND GND GND 4OEV
4
1DIR
3 2DIR 3DIRGND GND GND GND 4DIRV
1B01B21B41B62B02B22B42B73B03B23B43B64B04B24B44B
2
1B11B31B51B72B12B32B512B63B13B33B53B74B14B34B54B
1
AHJBDEG TCF KMNRLP
CC
CC
V
CC
V
CC
GND GND GND GNDV
GND GND GND GNDV
CC
CC
74LVC32245A;
74LVCH32245A
MNA475
6
7
V
CC
V
CC
7
6
handbook, halfpage
data
input
Fig.1 Pin configuration.
V
CC
to internal circuit
MNA473
Fig.2 Bus hold circuit.
1999 Sep 01 4
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1999 Sep 01 5
ok, full pagewidth
Philips Semiconductors Product specification
32-bit bus transceiver with direction pin;
5 V tolerant; 3-state
1DIR
A3
1OE
1A
0
A5
1A
1
A6
1A
2
B5
1A
3
B6
1A
4
C5
1A
5
C6
1A
6
D5
1A
7
D6
A4
1B
0
A2
1B
1
A1
1B
2
B2
1B
3
B1
1B
4
C2
1B
5
C1
1B
6
D2
1B
7
D1
2DIR
H3
2OE
2A
0
E5
2A
1
E6
2A
2
F5
2A
3
F6
2A
4
G5
2A
5
G6
2A
6
H6
2A
7
H5
H4
2B
0
E2
2B
1
E1
2B
2
F2
2B
3
F1
2B
4
G2
2B
5
G1
2B
6
H1
2B
7
H2
M5
M6
3DIR
J3
3OE
3A
0
J5
3A
1
J6
3A
2
K5
3A
3
K6
3A
4
L5
3A
5
L6
3A
6
3A
7
J4
3B
0
J2
3B
1
J1
3B
2
K2
3B
3
K1
3B
4
L2
3B
5
L1
3B
6
M2
3B
7
M1
4DIR
T3
4OE
4B
0
4B
1
4B
2
4B
3
4B
4
4B
5
4B
6
4B
7
MNA476
T4
N2
N1
P2
P1
R2
R1
T1
T2
74LVCH32245A
74LVC32245A;
4A
0
N5
4A
1
N6
4A
2
P5
4A
3
P6
4A
4
R5
4A
5
R6
4A
6
T6
4A
7
T5
Fig.3 Logic symbol.
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