INTEGRATED CIRCUITS
74LVC86A
Quad 2-input exclusive OR gate
Product specification |
1998 Apr 28 |
Supercedes data of 1997 Aug 11
IC24 Data Handbook
m n r
Philips Semiconductors |
Product specification |
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Quad 2-input exclusive OR gate |
74LVC86A |
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FEATURES
•Wide supply range of 1.2V to 3.6V
•Complies with JEDEC standard no. 8-1A
•Inputs accept voltages up to 5.5V
•CMOS low power consumption
•Direct interface with TTL levels
•5-volt tolerant inputs, for interfacing with 5-volt logic
DESCRIPTION
The 74LVC86A is a high-performance, low-power, low-voltage
Si-gate CMOS device that is pin and superior to most advanced CMOS compatible TTL families.
Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in a mixed 3.3 V/5 V environment.
The 74LVC86A provides the 2-input EXCLUSIVE-OR function.
QUICK REFERENCE DATA
GND = 0 V; Tamb = 25°C; tr = tf ≤ 2.5 ns
SYMBOL |
PARAMETER |
CONDITIONS |
TYPICAL |
UNIT |
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tPHL |
Propagation delay |
CL = 50 pF; |
3.0 |
ns |
tPLH |
nA, nB to nYn |
VCC = 3.3 V |
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CI |
Input capacitance |
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5.0 |
pF |
CPD |
Power dissipation capacitance per gate |
VCC = 3.3 V, VI = GND to VCC1 |
28 |
pF |
NOTE:
1.CPD is used to determine the dynamic power dissipation (PD in mW) PD = CPD × VCC2 × fi S (CL × VCC2 × fo) where:
fi = input frequency in MHz; CL = output load capacity in pF;
fo = output frequency in MHz; VCC = supply voltage in V;
S (CL × VCC2 × fo) = sum of the outputs.
ORDERING INFORMATION
PACKAGES |
TEMPERATURE RANGE |
OUTSIDE NORTH AMERICA |
NORTH AMERICA |
PKG. DWG. # |
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14-Pin Plastic DIL |
±40°C to +85°C |
74LVC86A N |
74LVC86A N |
SOT27-1 |
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14-Pin Plastic SO |
±40°C to +85°C |
74LVC86A D |
74LVC86A D |
SOT108-1 |
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14-Pin Plastic SSOP Type II |
±40°C to +85°C |
74LVC86A DB |
74LVC86A DB |
SOT337-1 |
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14-Pin Plastic TSSOP Type I |
±40°C to +85°C |
74LVC86A PW |
74LVC86APW DH |
SOT402-1 |
PIN CONFIGURATION |
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LOGIC SYMBOL (IEEE/IEC) |
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1 |
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1A |
1 |
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14 |
VCC |
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= 1 |
3 |
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1B |
2 |
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13 |
4B |
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2 |
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4 |
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1Y |
3 |
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12 |
4A |
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= 1 |
6 |
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2A |
4 |
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11 |
4Y |
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5 |
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2B |
5 |
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10 |
3B |
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9 |
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= 1 |
8 |
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2Y |
6 |
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9 |
3A |
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10 |
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GND |
7 |
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8 |
3Y |
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12 |
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= 1 |
11 |
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SV00481 |
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13 |
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PIN DESCRIPTION |
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SV00479 |
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PIN |
SYMBOL |
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FUNCTION |
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NUMBER |
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1, 4, 9, 12 |
1A ± 4A |
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Data inputs |
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2, 5, 10, 13 |
1B ± 4B |
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3, 6, 8, 11 |
1Y ± 4Y |
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Data outputs |
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7 |
GND |
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Ground (0 V) |
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14 |
VCC |
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Positive supply voltage |
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1998 Apr 28 |
2 |
853-2018 19310 |
Philips Semiconductors |
Product specification |
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Quad 2-input exclusive OR gate |
74LVC86A |
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LOGIC SYMBOL
1 |
1A |
3 |
2 |
1Y |
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1B |
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4 |
2A |
6 |
5 |
2Y |
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2B |
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9 |
3A |
8 |
10 |
3Y |
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3B |
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12 |
4A |
11 |
13 |
4Y |
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4B |
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SV00480 |
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LOGIC DIAGRAM (ONE GATE)
A
Y
B
SV00478
FUNCTION TABLE
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INPUTS |
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OUTPUTS |
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nA |
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nB |
nY |
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L |
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L |
L |
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L |
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H |
H |
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H |
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L |
H |
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H |
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H |
L |
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NOTES: |
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H |
= HIGH voltage level |
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L |
= LOW voltage level |
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RECOMMENDED OPERATING CONDITIONS
SYMBOL |
PARAMETER |
CONDITIONS |
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LIMITS |
UNIT |
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MIN |
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MAX |
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VCC |
DC supply voltage (for max. speed performance) |
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2.7 |
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3.6 |
V |
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DC supply voltage (for low-voltage applications) |
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1.2 |
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3.6 |
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VI |
DC Input voltage range |
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0 |
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5.5 |
V |
VO |
DC output voltage range |
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0 |
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VCC |
V |
Tamb |
Operating ambient temperature range in free-air |
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±40 |
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+85 |
°C |
tr, tf |
Input rise and fall times |
VCC = 1.2 to 2.7V |
0 |
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20 |
ns/V |
VCC = 2.7 to 3.6V |
0 |
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10 |
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ABSOLUTE MAXIMUM RATINGS1
Absolute Maximum Rating System (IEC 134)
Voltages are referenced to GND (ground = 0V)
SYMBOL |
PARAMETER |
CONDITIONS |
RATING |
UNIT |
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VCC |
DC supply voltage (for max. speed |
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±0.5 to +6.5 |
V |
performance) |
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IIK |
DC input diode current |
VI t0 |
±50 |
mA |
VI |
DC input voltage |
Note 2 |
±0.5 to +5.5 |
V |
IOK |
DC output diode current |
VO uVCC or VO t 0 |
"50 |
mA |
VO |
DC output voltage |
Note 2 |
±0.5 to VCC + 0.5 |
V |
IO |
DC output source or sink current |
VO = 0 to VCC |
"50 |
mA |
IGND, ICC |
DC VCC or GND current |
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"100 |
mA |
Tstg |
Storage temperature range |
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±65 to +150 |
°C |
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Power dissipation per package |
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PTOT |
± plastic mini-pack (SO) |
above +70°C derate linearly with 8 mW/K |
500 |
mW |
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± plastic shrink mini-pack (SSOP and TSSOP) |
above +60°C derate linearly with 5.5 mW/K |
500 |
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NOTES:
1.Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under ªrecommended operating conditionsº is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
2.The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
1998 Apr 28 |
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