INTEGRATED CIRCUITS
74LVC86
Quad 2-input EXCLUSIVE-OR gate
Product specification
Supersedes data of February 1996
IC24 Data Handbook
1997 Mar 18
Philips Semiconductors Product specification
74L VC86Quad 2-input EXCLUSIVE-OR gate
FEA TURES
•Wide supply voltage range of 1.2 to 3.6 V
•In accordance with JEDEC standard no. 8-1A.
•Inputs accept voltages up to 5.5 V
•CMOS low power consumption
•Direct interface with TTL levels
DESCRIPTION
The 74LVC86 is a high-performance, low-power, low-voltage Si-gate
CMOS device that is pin and superior to most advanced CMOS
compatible TTL families.
Inputs can be driven from either 3.3 V or 5 V devices. This feature
allows the use of these devices as translators in a mixed 3.3 V/5 V
environment.
The 74LVC86 provides the 2-input EXCLUSIVE-OR function.
QUICK REFERENCE DATA
GND = 0 V; T
= 25°C; tr = t
amb
SYMBOL
t
PHL
t
PLH
C
I
C
PD
NOTE:
is used to determine the dynamic power dissipation (PD in µW)
1. C
PD
= CPD × V
P
D
= input frequency in MHz; CL = output load capacity in pF;
f
i
= output frequency in MHz; VCC = supply voltage in V;
f
o
× V
Σ (C
L
2
× fi Σ (CL × V
CC
2
× fo) = sum of the outputs.
CC
≤ 2.5 ns
f
PARAMETER CONDITIONS TYPICAL UNIT
Propagation delay
nA, nB to nY
CL = 15 pF;
= 3.3 V
V
CC
3.7 ns
Input capacitance 5.0 pF
Power dissipation capacitance per gate VCC = 3.3 V, VI = GND to V
2
× fo) where:
CC
CC
1
55 pF
ORDERING INFORMATION
PACKAGES TEMPERATURE RANGE OUTSIDE NORTH AMERICA NORTH AMERICA PKG. DWG. #
14-Pin Plastic DIL –40°C to +85°C 74LVC86 N 74LVC86 N SOT27-1
14-Pin Plastic SO –40°C to +85°C 74LVC86 D 74LVC86 D SOT108-1
14-Pin Plastic SSOP Type II –40°C to +85°C 74LVC86 DB 74LVC86 DB SOT337-1
14-Pin Plastic TSSOP Type I –40°C to +85°C 74LVC86 PW 74LVC86PW DH SOT402-1
PIN CONFIGURATION
1
1A
2
1B
3
1Y
4
2A
5
2B
6
2Y
GND
7
PIN DESCRIPTION
PIN
NUMBER
1, 4, 9, 12 1A – 4A Data inputs
2, 5, 10, 13 1B – 4B Data inputs
3, 6, 8, 11 1Y – 4Y Data outputs
7 GND Ground (0 V)
14 V
SYMBOL FUNCTION
Positive supply voltage
CC
LOGIC SYMBOL (IEEE/IEC)
14
V
CC
13
4B
12
4A
11
4Y
10
3B
9
3A
3Y
8
SV00481
1
2
4
5
9
10
12
13
=1
=1
=1
=1
3
6
8
11
SV00479
1997 Mar 18 853–1946 17864
2
Philips Semiconductors Product specification
Quad 2-input EXCLUSIVE-OR gate
LOGIC SYMBOL
1A
1
1B
2
2A
4
2B
5
3A
9
3B
10
4A
12
4B
13
LOGIC DIAGRAM (ONE GATE)
A
B
RECOMMENDED OPERATING CONDITIONS
V
V
V
T
V
V
amb
tr, t
DC supply voltage (for max. speed performance) 2.7 3.6 V
CC
DC supply voltage (for low-voltage applications) 1.2 3.6 V
CC
DC input voltage range 0 5.5 V
I
DC input voltage range for I/Os 0 V
I/O
DC output voltage range 0 V
O
Operating free-air temperature range –40 +85 °C
Input rise and fall times
f
1Y
3
2Y
6
3Y
8
4Y
11
Y
SV00480
SV00478
FUNCTION TABLE
INPUTS OUTPUTS
nA nB nY
L L L
L H H
H L H
H H L
NOTES:
H = HIGH voltage level
L =LOW voltage level
VCC = 1.2 to 2.7V
= 2.7 to 3.6V
V
CC
LIMITS
MIN MAX
CC
CC
0
0
20
10
74LVC86
V
V
ns/V
ABSOLUTE MAXIMUM RATINGS
1
In accordance with the Absolute Maximum Rating System (IEC 134).
Voltages are referenced to GND (ground = 0V).
SYMBOL
V
CC
I
IK
V
I
V
I/O
I
OK
V
OUT
I
OUT
I
, I
GND
CC
T
stg
DC supply voltage –0.5 to +6.5 V
DC input diode current VIt 0 –50 mA
DC input voltage Note 2 –0.5 to +5.5 V
DC input voltage range for I/Os –0.5 to VCC +0.5 V
DC output diode current V
DC output voltage Note 2 –0.5 to VCC +0.5 V
DC output source or sink current VO = 0 to V
DC VCC or GND current "100 mA
Storage temperature range –60 to +150 °C
PARAMETER CONDITIONS RATING UNIT
uVCC or VO t 0 "50 mA
O
CC
"50 mA
Power dissipation per package
P
TOT
– plastic mini-pack (SO) above +70°C derate linearly with 8 mW/K 500
– plastic shrink mini-pack (SSOP and TSSOP) above +60°C derate linearly with 5.5 mW/K 500
NOTES:
1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the
device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability .
2. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
1997 Mar 18
3