Philips 74LVC32APW, 74LVC32ADB, 74LVC32AD Datasheet
INTEGRATED CIRCUITS
74LVC32A
Quad 2-input OR gate
Product specification
IC24 Data Handbook
1997 Jun 30
Philips Semiconductors Product specification
Data inputs
74L VC32AQuad 2-input OR gate
FEA TURES
•Wide supply voltage range of 1.2 V to 3.6 V
•In accordance with JEDEC standard no. 8-1A.
•Inputs accept voltages up to 5.5 V
•CMOS low power consumption
•Direct interface with TTL levels
DESCRIPTION
The 74LVC32A is a high-performance, low-power, low-voltage
Si-gate CMOS device and superior to most advanced CMOS
compatible TTL families.
Inputs can be driven from either 3.3V or 5V devices. This feature
allows the use of these devices as translators in a mixed 3.3V/5V
environment.
The 74LVC32A provides the 2-input OR function.
QUICK REFERENCE DATA
GND = 0 V; T
SYMBOL
t
NOTES:
1. C
is used to determine the dynamic power dissipation (PD in µW)
PD
= CPD × V
P
D
f
= input frequency in MHz; CL = output load capacity in pF;
i
= output frequency in MHz; VCC = supply voltage in V;
f
o
(C
L
2. The condition is V
= 25°C; tr = tf ≤ 2.5 ns
amb
PHL/tPLH
C
I
C
PD
2
× fi (CL × V
CC
2
× V
× fo) = sum of the outputs.
CC
= GND to V
I
PARAMETER CONDITIONS TYPICAL UNIT
Propagation delay
nA, nB to nY
CL = 50 pF;
V
= 3.3 V
CC
2.6 ns
Input capacitance 5.0 pF
Power dissipation capacitance per gate Notes 1 and 2 28 pF
2
× fo) where:
CC
CC.
ORDERING INFORMATION
PACKAGES TEMPERATURE RANGE OUTSIDE NORTH AMERICA NORTH AMERICA DWG NUMBER
14-Pin Plastic SO –40°C to +85°C 74LVC32A D 74LVC32A D SOT108-1
14-Pin Plastic SSOP Type II –40°C to +85°C 74LVC32A DB 74LVC32A DB SOT337-1
14-Pin Plastic TSSOP Type I –40°C to +85°C 74LVC32A PW 74LVC32APW DH SOT402-1
PIN CONFIGURATION
1
1A
2
1B
3
1Y
4
2A
5
2B
6
2Y
GND
7
14
13
12
11
10
9
8
SV00450
PIN DESCRIPTION
V
CC
4B
4A
4Y
3B
3A
3Y
PIN NUMBER SYMBOL NAME AND FUNCTION
1, 4, 9, 12 1A – 4A
2, 5, 10, 13 1B – 4B
p
3, 6, 8, 11 1Y – 4Y Data outputs
7 GND Ground (0 V)
14 V
CC
Positive supply voltage
1997 Jun 30 853-1995 18166
2
Philips Semiconductors Product specification
74LVC32AQuad 2-input OR gate
LOGIC SYMBOL
1A
1
1B
2
2A
4
5
2B
9
3A
3B
10
4A
12
13
4B
LOGIC SYMBOL (IEEE/IEC)
1
2
4
5
≥1
≥1
1Y
2Y
3Y
4Y
SV00452
3
6
LOGIC DIAGRAM (ONE GATE)
3
6
A
B
Y
SV00454
FUNCTION TABLE
8
nA nB nY
11
NOTES:
H = HIGH voltage level
L = LOW voltage level
INPUTS OUTPUTS
L L L
L H H
H L H
H H H
9
10
12
13
≥1
≥1
8
11
SV00453
1997 Jun 30
3
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