INTEGRATED CIRCUITS
DATA SHEET
74LVC2245A
Octal transceiver with direction pin; 30 Ω series termination resistors; 5 V input/output tolerant; 3-state
Product specification |
1999 Jun 15 |
Supersedes data of 1999 Mar 23
File under Integrated Circuits, IC24
Philips Semiconductors |
Product specification |
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Octal transceiver with direction pin; 30 Ω series
74LVC2245A
termination resistors; 5 V input/output tolerant; 3-state
FEATURES
∙5 V tolerant inputs/outputs for interfacing with 5 V logic
∙Wide supply voltage range of 1.2 to 3.6 V
∙CMOS low power consumption
∙Direct interface with TTL levels
∙Integrated 30 Ω termination resistors
DESCRIPTION
The 74LVC2245A is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families.
Inputs can be driven from either 3.3 or 5 V devices. In 3-state operation, outputs can handle 5 V. These
features allow the use of these devices as translators in a mixed 3.3 V/5 V environment.
The 74LVC2245A is an octal transceiver featuring non-inverting 3-state bus compatible outputs in both send and receive directions. The ‘245’ features an output enable (OE) input for easy cascading and a send/receive (DIR) input for direction control OE controls the outputs so that the buses are effectively isolated.
The 74LVC2245A is designed with 30 Ω series termination resistors in both HIGH and LOW output stages to reduce line noise.
FUNCTION TABLE
See note 1.
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INPUT |
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INPUT/OUTPUT |
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DIR |
An |
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Bn |
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OE |
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L |
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L |
A = B |
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inputs |
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L |
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H |
inputs |
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B = A |
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H |
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X |
Z |
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Z |
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Note
1.H = HIGH voltage level; L = LOW voltage level; X = don’t care;
Z = high-impedance OFF-state.
ORDERING INFORMATION
OUTSIDE NORTH |
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PACKAGE |
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NORTH AMERICA |
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TEMPERATURE |
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AMERICA |
PINS |
PACKAGE |
MATERIAL |
CODE |
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RANGE |
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74LVC2245AD |
74LVC2245AD |
−40 to +85 °C |
20 |
SO |
plastic |
SOT163-1 |
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74LVC2245ADB |
74LVC2245ADB |
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20 |
SSOP |
plastic |
SOT339-1 |
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74LVC2245APW |
74LVC2245APW DH |
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20 |
TSSOP |
plastic |
SOT360-1 |
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1999 Jun 15 |
2 |
Philips Semiconductors |
Product specification |
Octal transceiver with direction pin; 30 Ω series
74LVC2245A
termination resistors; 5 V input/output tolerant; 3-state
QUICK REFERENCE DATA
GND = 0 V; Tamb = 25 °C; tr = tf ≤ 2.5 ns.
SYMBOL |
PARAMETER |
CONDITIONS |
TYPICAL |
UNIT |
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tPHL/tPLH |
propagation delay An to Bn; Bn to An |
CL = 50 pF; VCC = 3.3 V |
3.9 |
ns |
CI |
input capacitance |
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5.0 |
pF |
CPD |
power dissipation capacitance per buffer |
VI = GND to VCC; note 1 |
27 |
pF |
Note
1.CPD is used to determine the dynamic power dissipation (PD in μW). PD = CPD × VCC2 × fi + Σ(CL × VCC2 × fo) where:
fi = input frequency in MHz; fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in V;
Σ(CL × VCC2 × fo) = sum of the outputs.
PINNING
PIN |
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SYMBOL |
DESCRIPTION |
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1 |
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DIR |
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direction control |
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2, 3, 4, 5, 6, 7, 8, 9 |
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A0 to A7 |
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data inputs/outputs |
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10 |
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GND |
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ground (0 V) |
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18, 17, 16, 15, 14, 13, 12, 11 |
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B0 to B7 |
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data inputs/outputs |
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19 |
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output enable input (active LOW) |
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OE |
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20 |
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VCC |
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DC supply voltage |
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1999 Jun 15 |
3 |
Philips Semiconductors |
Product specification |
Octal transceiver with direction pin; 30 Ω series
74LVC2245A
termination resistors; 5 V input/output tolerant; 3-state
handbook, halfpage
DIR |
1 |
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20 |
VCC |
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A0 |
2 |
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19 |
OE |
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A1 |
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B0 |
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3 |
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18 |
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B1 |
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A2 |
4 |
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17 |
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A3 |
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B2 |
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5 |
16 |
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A4 |
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2245 |
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B3 |
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6 |
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15 |
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A5 |
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B4 |
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7 |
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14 |
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A6 |
8 |
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B5 |
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13 |
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A7 |
9 |
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B6 |
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12 |
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GND 10 |
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B7 |
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11 |
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MNA363 |
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Fig.1 Pin configuration.
19 |
G3 |
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1 |
3EN1 (BA) |
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3EN2 (AB) |
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1 |
2 |
18 |
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2 |
3 |
17 |
4 |
16 |
5 |
15 |
6 |
14 |
7 |
13 |
8 |
12 |
9 |
11 |
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MNA365 |
DIR 1 
OE 19
A0
2
B0
18
A1
3
B1
17
A2
4
B2
16
A3
5
B3
15
A4
6
B4
14
A5
7
B5
13
A6
8
B6
12
A7
9
B7
11
MNA364
Fig.3 IEC logic symbol. |
Fig.2 Logic symbol. |
1999 Jun 15 |
4 |
Philips Semiconductors |
Product specification |
Octal transceiver with direction pin; 30 Ω series
74LVC2245A
termination resistors; 5 V input/output tolerant; 3-state
RECOMMENDED OPERATING CONDITIONS
SYMBOL |
PARAMETER |
CONDITIONS |
LIMITS |
UNIT |
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MIN. |
MAX. |
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VCC |
DC supply voltage (for max. speed |
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2.7 |
3.6 |
V |
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performance) |
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DC supply voltage (for low-voltage |
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1.2 |
3.6 |
V |
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applications) |
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VI |
DC input voltage range |
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0 |
5.5 |
V |
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VO |
DC output voltage range; output HIGH or |
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0 |
VCC |
V |
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LOW state |
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DC output voltage range; 3-state |
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0 |
5.5 |
V |
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Tamb |
operating ambient temperature range |
see DC and AC characteristics per |
−40 |
+85 |
°C |
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device |
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tr,tf |
input rise and fall times |
VCC = 1.2 to 2.7 V |
0 |
20 |
ns/V |
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VCC = 2.7 to 3.6 V |
0 |
10 |
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LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134). Voltages are referenced to GND (ground = 0 V).
SYMBOL |
PARAMETER |
CONDITIONS |
MIN. |
MAX. |
UNIT |
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VCC |
DC supply voltage |
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−0.5 |
+6.5 |
V |
IIK |
DC input diode current |
VI < 0 |
− |
−50 |
mA |
VI |
DC input voltage |
note 1 |
−0.5 |
+5.5 |
V |
IOK |
DC output diode current |
VO > VCC or VO < 0 |
− |
±50 |
mA |
VO |
DC output voltage; output HIGH |
note 1 |
−0.5 |
VCC + 0.5 |
V |
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or LOW |
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DC output voltage; output 3-state |
note 1 |
−0.5 |
+6.5 |
V |
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IO |
DC output diode current |
VO = 0 to VCC |
− |
±50 |
mA |
IGND, ICC |
DC VCC or GND current |
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− |
±100 |
mA |
Tstg |
storage temperature range |
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−65 |
+150 |
°C |
Ptot |
power dissipation per package |
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plastic mini-pack (SO) |
above +70 °C derate linearly with 8 mW/K |
− |
500 |
mW |
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plastic shrink mini-pack (SSOP |
above +60 °C derate linearly with |
− |
500 |
mW |
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and TSSOP) |
5.5 mW/K |
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Note
1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
1999 Jun 15 |
5 |
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