Philips 74LVC1G66GW Datasheet

INTEGRATED CIRCUITS
DATA SH EET
74LVC1G66
Bilateral switch
Product specification File under Integrated Circuits, IC24
2001 Oct 30
Bilateral switch 74LVC1G66

FEATURES

Very low ON resistance: –10Ω (typical) at VCC= 2.7 V –8Ω (typical) at VCC= 3.3 V –6Ω (typical) at VCC=5V.

DESCRIPTION

The 74LVC1G66 is a high-speed Si-gate CMOS device. The 74LVC1G66 provides an analog switch. The switch
has two input/output pins (Y and Z) and an active HIGH enable input pin (E). When pin E is LOW, the analog switch is turned off.
ESD protection: – HBM EIA/JESD22-A114-A exceeds 2000 V – MM EIA/JESD22-A115-A exceeds 200 V.
High noise immunity
CMOS low power consumption
Latch up performance exceeds 250 mA
SOT353 package
Direct interface TTL-levels.

QUICK REFERENCE DATA

Ground = 0 V; T
=25°C; tr=tf≤3.0 ns.
amb
SYMBOL PARAMETER CONDITIONS TYPICAL UNIT
t
PZH/tPZL
t
PHZ/tPLZ
C
I
C
PD
turn-on time E to V
turn-off time E to V
os
os
CL= 50 pF; RL= 500 ; VCC= 3 V 2.6 ns C
= 50 pF; RL= 500 ; VCC= 5 V 1.9 ns
L
CL= 50 pF; RL= 500 ; VCC= 3 V 3.4 ns C
= 50 pF; RL= 500 ; VCC= 5 V 2.5 ns
L
input capacitance 2 pF power dissipation capacitance CL= 50 pF; f = 10 MHz;
16 pF
VCC = 3.3 V; notes 1 and 2
C
S
switch capacitance OFF-state 5 pF
ON-state 9.5 pF
Notes
1. C
is used to determine the dynamic power dissipation (PDin µW).
PD
PD=CPD× V
2
× fi+(CL+CS)×V
CC
2
× fo where:
CC
fi= input frequency in MHz; fo= output frequency in MHz; CL= output load capacitance in pF; CS= max. switch capacitance in pF; VCC= supply voltage in Volts.
2. The condition is VI= GND to VCC.
2001 Oct 30 2
Bilateral switch 74LVC1G66

FUNCTION TABLE

See note 1.
INPUT E SWITCH
L OFF
Note
1. H = HIGH voltage level;
L = LOW voltage level.

ORDERING INFORMATION

PACKAGE
TYPE NUMBER
74LVC1G66GW 40 to +85 °C 5 SC-88A plastic SOT353 VL
TEMPERATURE
RANGE
PINS PACKAGE MATERIAL CODE MARKING

PINNING

handbook, halfpage
PIN SYMBOL DESCRIPTION
1 Y independent input/output 2 Z independent output/input 3 GND ground (0 V) 4 E enable input (active HIGH) 5V
Y Z
GND
CC
1 2
66
3
MNA074
V
5
E
4
CC
supply voltage
handbook, halfpage
Y
E
Z
MNA657
Fig.1 Pin configuration.
2001 Oct 30 3
Fig.2 Logic symbol.
Bilateral switch 74LVC1G66
handbook, halfpage
handbook, halfpage
1 4 #
1 X1
1
MNA076
Fig.3 IEC logic symbol.
2
Y
E
V
CC
Fig.4 Logic diagram.

RECOMMENDED OPERATING CONDITIONS

SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT
V
CC
V
I
V
S
T
amb
t
r,tf
supply voltage 1.65 5.5 V input voltage 0 5.5 V switch voltage 0 V
CC
operating ambient temperature 40 +85 °C input rise and fall times VCC= 1.65 to 2.7 V 0 20 ns/V
V
= 2.7 to 5.5 V 0 10 ns/V
CC
Z
MNA658
V
2001 Oct 30 4
Bilateral switch 74LVC1G66

LIMITING VALUES

In accordance with theAbsolute Maximum Rating System (IEC 60134); voltages are referenced to GND (ground = 0 V); see note 1.
SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT
V
CC
I
IK
I
SK
I
S
I
CC
T
stg
P
D
Notes
1. To avoid drawing VCC current out of pin Z, when switch current flows into pin Y, the voltage drop across the
bidirectional switch must not exceed 0.4 V. If the switch current flows into pin Z, no VCCcurrent will flow out of pin Y. In this case there is no limit for the voltage drop across the switch, but the voltage at pins Y and Z may not exceed VCC or GND.
2. Above 55 °C the value of PD derates linearly with 2.5 mW/K.
supply voltage 0.5 +6.5 V input diode current VI< 0.5 or VI>VCC+ 0.5 V −−50 mA switch diode current VS< 0.5 or VS>VCC+ 0.5 V −±50 mA switch source or sink current 0.5V<VO<VCC+ 0.5 V −±50 mA VCC or GND current −±100 mA storage temperature 65 +150 °C power dissipation per package for temperature range from 40 to +85 °C;
200 mW
note 2
2001 Oct 30 5
Bilateral switch 74LVC1G66

DC CHARACTERISTICS

With regard to recommended operating conditions; voltages are referenced to GND (ground=0V).
SYMBOL PARAMETER
V
IH
V
IL
I
I
HIGH-level input voltage 1.65 to 1.95 0.65 × VCC−− V
LOW-level input voltage 1.65 to 1.95 −−0.35 × VCCV
input leakage current (control pin)
I
S
analog switch OFF-state current
I
S
analog switch ON-state current
I
I
CC
CC
quiescent supply current VI=VCCor GND;
additional quiescent supply current per control pin
TEST CONDITIONS T
OTHER VCC (V)
MIN. TYP.
(°C)
amb
40 to +85
(1)
UNIT
MAX.
2.3 to 2.7 1.7 −− V
2.7 to 3.6 2.0 −− V
4.5 to 5.5 0.7 × V
−− V
CC
2.3 to 2.7 −−0.7 V
2.7 to 3.6 −−0.8 V
4.5 to 5.5 −−0.30 × V
CC
V
VI= 5.5 Vor GND 5.5 −±0.1 ±5 µA
VI=VIHor VIL;
5.5 −±0.1 ±5 µA |VS| =VCC− GND; see Fig.6
VI=VIHor VIL;
5.5 −±0.1 ±5 µA |VS| =VCC− GND; see Fig.7
5.5 0.1 10 µA VS= GND or VCC; IO=0A
VI=VCC− 0.6 V;
5.5 5 500 µA VS= GND or VCC; IO=0A
Note
1. All typical values are at T
amb
=25°C.
2001 Oct 30 6
Bilateral switch 74LVC1G66
Type 74LVC1G66
SYMBOL PARAMETER
R
ON
ON-resistance (peak) VS= GND to VCC;
ON-resistance (rail) V
ON-resistance (rail) V
ON-resistance (flatness)
TEST CONDITIONS T
OTHER
VI=VIH; see Fig.5
= GND; VI=VIH;
S
see Fig.5
S=VCC
; VI=VIH;
see Fig.5
V
= GND to VCC;
S
VI=VIH; see Figs 9 to 12
(°C)
amb
I
S
(mA)
VCC (V)
40 to +85
MIN. TYP.
(1)
MAX.
UNIT
4 1.65 1.95 35 100 8 2.3 2.7 14 30 12 2.7 11.5 25 24 3.0 3.6 8.5 20 32 4.5 5.5 6.5 15 4 1.65 1.95 10 30 8 2.3 2.7 8.5 20 12 2.7 7.5 18 24 3.0 3.6 6.5 15 32 4.5 5.5 610 4 1.65 1.95 12 30 8 2.3 2.7 8.5 20 12 2.7 7.5 18 24 3.0 3.6 6.5 15 32 4.5 5.5 610
(2) (2)
(2)
−Ω
(2)
−Ω
(2)
−Ω
−Ω
−Ω
4 1.8 100 8 2.5 17 12 2.7 10 24 3.3 5 32 5.0 3
Notes
1. All typical values are measured at T
amb
=25°C.
2. RON flatness over operating temperature range (40 to +85 °C).
2001 Oct 30 7
Bilateral switch 74LVC1G66
E
V
E
V
IH
YZ
V
= GND to V
S
CC
GND
V
I
S
GND
MNA659
IL
Y
AA
V
= VCC or GND
I
Z
VO = GND or V
MNA660
CC
GND
Fig.5 Test circuit for measuring ON-resistance
(RON).
E
V
IH
Y
AA
V
= VCC or GND
I
Z
VO (open circuit)
GND
MNA661
Fig.6 Test circuit for circuit OFF-state current.
2
10
handbook, halfpage
R
ON
VCC = 1.8 V
()
10
1
2.5 V
3.3 V
5.0 V
2.7 V
MNA673
50 1234
V
(V)
I
Fig.7 Test circuit for measuring ON-state current.
2001 Oct 30 8
Fig.8 Typical ON-resistance (RON) as a function
of input voltage (VS) for VS= GND to VCC.
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