Philips 74LVC1G04GW Datasheet
INTEGRATED CIRCUITS
DATA SH EET
74LVC1G04
Single inverter
Product specification
Supersedes data of 2000 Nov 21
File under Integrated Circuits, IC24
2001 Jan 19
Philips Semiconductors Product specification
Single inverter 74LVC1G04
FEATURES
• Wide supply voltage range from 1.65 to 5.5 V
• High noise immunity
• Complies with JEDEC standard:
– JESD8-7 (1.65 to 1.95 V)
– JESD8-5 (2.3 to 2.7 V)
– JESD8B/JESD36 (2.7 to 3.6 V).
•±24 mA output drive (VCC= 3.0 V)
• CMOS low power consumption
• Latch-up performance ≤250 mA
• Direct interface with TTL levels
• Inputs accept voltages up to 5 V
• SOT353 package.
DESCRIPTION
The 74LVC1G04 is a high-performance, low-power,
low-voltage, Si-gate CMOS device, superior to most
advanced CMOS compatible TTL families.
The input can be driven from either 3.3 or 5 V devices.
These features allow the use of these devices in a mixed
3.3 and 5 V environment.
Schmitttriggeractionattheinputmakesthecircuittolerant
for slower input rise and fall time.
This device is fully specified for partial power-down
applications using I
. The I
off
circuitry disables the output,
off
preventing the damaging backflow current through the
device when it is powered down.
The 74LVC1G04 provides the inverting buffer.
QUICK REFERENCE DATA
GND = 0 V; T
=25°C; tr=tf≤2.5 ns.
amb
SYMBOL PARAMETER CONDITIONS TYP. UNIT
t
PHL/tPLH
C
I
C
PD
propagation delay input A to output Y VCC= 1.8 V; CL= 30 pF; RL=1kΩ 3ns
V
= 2.5 V; CL= 30 pF; RL= 500 Ω 2ns
CC
V
= 2.7 V; CL= 50 pF; RL= 500 Ω 2.3 ns
CC
V
= 3.3 V; CL= 50 pF; RL= 500 Ω 2ns
CC
V
= 5.0 V; CL= 50 pF; RL= 500 Ω 1.6 ns
CC
input capacitance 5 pF
power dissipation capacitance per buffer VCC= 3.3 V; notes 1 and 2 14 pF
Notes
1. C
is used to determine the dynamic power dissipation (PDin µW).
PD
P
D=CPD
× V
2
× fi+ Σ (CL× V
CC
2
× fo) where:
CC
fi= input frequency in MHz;
fo= output frequency in MHz;
CL= output load capacitance in pF;
VCC= supply voltage in Volts.
2. VI= GND to VCC.
2001 Jan 19 2
Philips Semiconductors Product specification
Single inverter 74LVC1G04
FUNCTION TABLE
See note 1.
INPUT OUTPUT
AY
LH
HL
Note
1. H = HIGH voltage level;
L = LOW voltage level.
ORDERING INFORMATION
PACKAGE
TYPE NUMBER
74LVC1G04GW −40 to +85 °C 5 SC-88A plastic SOT353 VC
TEMPERATURE
RANGE
PINS PACKAGE MATERIAL CODE MARKING
PINNING
handbook, halfpage
handbook, halfpage
PIN SYMBOL DESCRIPTION
1 n.c. not connected
2 A data input A
3 GND ground (0 V)
4 Y data output Y
5V
n.c.
A
GND
CC
1
2
04
3
MNA107
V
5
Y
4
Fig.1 Pin configuration.
2
1
MNA109
4
CC
supply voltage
handbook, halfpage
handbook, halfpage
AY
2
Fig.2 Logic symbol.Fig.2 Logic symbol.
A
4
MNA108
Y
MNA110
Fig.3 IEE/IEC logic symbol.
2001 Jan 19 3
Fig.4 Logic diagram.
Philips Semiconductors Product specification
Single inverter 74LVC1G04
RECOMMENDED OPERATING CONDITIONS
SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT
V
CC
V
I
V
O
T
amb
t
, t
r
f
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 60134); voltages are referenced to GND (ground = 0 V).
SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT
V
CC
I
IK
V
I
I
OK
V
O
I
O
I
, I
CC
GND
T
stg
P
D
supply voltage 1.65 5.5 V
input voltage 0 5.5 V
output voltage active mode 0 V
V
= 0 V; Power-down mode 0 5.5 V
CC
CC
V
operating ambient temperature −40 +85 °C
input rise and fall times VCC= 1.65 to 2.7 V 0 20 ns/V
V
= 2.7 to 5.5 V 0 10 ns/V
CC
supply voltage −0.5 +6.5 V
input diode current VI<0 −−50 mA
input voltage note 1 −0.5 +6.5 V
output diode current VO>VCC or VO<0 −±50 mA
output voltage active mode; notes 1 and 2 −0.5 VCC+ 0.5 V
Power-down mode; notes 1 and 2 −0.5 +6.5 V
output diode current VO=0toV
CC
−±50 mA
VCC or GND current −±100 mA
storage temperature −65 +150 °C
power dissipation per package for temperature range from
− 200 mW
−40 to +85 °C; note 3
Notes
1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. When VCC= 0 V (Power-down mode), the output voltage can be 5.5 V in normal operation.
3. Above 55 °C the value of PD derates linearly with 2.5 mW/K.
2001 Jan 19 4
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