Philips 74LVC125ADB, 74LVC125AD, 74LVC125APW Datasheet
INTEGRATED CIRCUITS
74LVC125A
Quad buffer/line driver with 5-volt tolerant
inputs/outputs (3-State)
Product specification
Supersedes data of 1997 Aug 01
IC24 Data Handbook
1998 Apr 28
Philips Semiconductors Product specification
t
gy
L
3.0
ns
Quad buffer/line driver with 5-volt
tolerant inputs/outputs (3-state)
74L VC125A
FEA TURES
•5-volt tolerant inputs/outputs, for interfacing with 5-volt logic
•Supply voltage range of 1.2V to 3.6V
•Complies with JEDEC standard no. 8-1A
•CMOS low power consumption
•Direct interface with TTL levels
•High impedance when V
QUICK REFERENCE DATA
GND = 0 V; T
SYMBOL
NOTES:
is used to determine the dynamic power dissipation (PD in µW)
1. C
PD
P
= CPD × V
D
fi = input frequency in MHz; CL = output load capacity in pF;
= output frequency in MHz; VCC = supply voltage in V;
f
o
(C
L
2. The condition is VI = GND to V
= 25°C; tr = tf ≤ 2.5 ns
amb
PHL/tPLH
C
I
C
PD
2
× fi (CL × V
CC
2
× V
× fo) = sum of the outputs.
CC
= 0V
CC
PARAMETER CONDITIONS TYPICAL UNIT
Propagation delay CL = 50 pF;
nA to nY
Input capacitance 5.0 pF
Power dissipation capacitance per buffer
2
× fo) where:
CC
CC
DESCRIPTION
The 74LVC125A is a high performance, low-power, low-voltage
Si-gate CMOS device and superior to most advanced CMOS
compatible TTL families.
Inputs can be driven from either 3.3V or 5.0V devices. In 3-state
operation, outputs can handle 5V .
The 74LVC125A consists of four non-inverting buffers/line drivers
with 3-state outputs. The 3-state outputs (nY) are controlled by the
output enable input (nOE
assume a high impedance OFF-state.
VCC = 3.3 V
VCC = 3.3 V
Notes 1 and 2
). A HIGH at nOE causes the outputs to
25 pF
ORDERING INFORMATION
PACKAGES TEMPERATURE RANGE OUTSIDE NORTH AMERICA NORTH AMERICA PKG. DWG. #
14-Pin Plastic SO –40°C to +125°C 74LVC125A D 74LVC125A D SOT108-1
14-Pin Plastic SSOP Type II –40°C to +125°C 74LVC125A DB 74LVC125A DB SOT337-1
14-Pin Plastic TSSOP Type I –40°C to +125°C 74LVC125A PW 7LVC125APW DH SOT402-1
1998 Apr 28 853-2010 19310
2
Philips Semiconductors Product specification
Quad buffer/line driver with 5-volt
tolerant inputs/outputs (3-state)
PIN CONFIGURATION
1
1OE
2
1A
3
1Y
4
2OE
5
2A
6
2Y
GND
7
PIN DESCRIPTION
PIN
NUMBER
1, 4, 10, 13 1OE – 4OE Data enable inputs (active LOW)
2, 5, 9, 12 1A – 4A Data inputs
3, 6, 8, 11 1Y – 4Y Data Outputs
7 GND Ground (0 V)
14 V
SYMBOL NAME AND FUNCTION
CC
Positive supply voltage
LOGIC SYMBOL
2
1A
1OE
1
5
2A
1Y
2Y
14
13
12
11
10
9
8
SV00455
3
6
V
CC
4OE
4A
4Y
3OE
3A
3Y
FUNCTION TABLE
INPUTS OUTPUT
nOE nA nY
L L L
L H H
H X Z
NOTES:
H = HIGH voltage level
L = LOW voltage level
X = don’t care
Z = high impedance OFF-state
LOGIC SYMBOL (IEEE/IEC)
2
1
EN1
5
4
9
10
12
13
74LVC125A
1
3
6
8
11
SV00457
1998 Apr 28
2OE
4
8
9
3A
3OE
10
12
4A
4OE
13
3Y
4Y
SV00456
11
3
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