Philips 74LVC08APW, 74LVC08ADB, 74LVC08AD, 74LVC08PW, 74LVC08DB Datasheet

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74LVC08A
Quad 2-input AND gate
Product specification IC24 Data Handbook
1997 Jun 30
INTEGRATED CIRCUITS
74L VC08AQuad 2-input AND gate
2
1997 Jun 30 853-1996 18167
FEA TURES
Wide supply voltage range of 1.2 V to 3.6 V
In accordance with JEDEC standard no. 8-1A
Inputs accept voltages up to 5.5 V
CMOS low power consumption
Direct interface with TTL levels
DESCRIPTION
The 74LVC08A is a high-performance, low-power, low-voltage, Si-gate CMOS device and superior to most advanced CMOS compatible TTL families.
Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in a mixed 3.3 V/5 V environment.
The 74LVC08A provides the 2-input AND function.
QUICK REFERENCE DA TA
GND = 0 V; T
amb
= 25°C; tr = tf 2.5 ns
SYMBOL
PARAMETER CONDITIONS TYPICAL UNIT
t
PHL/tPLH
Propagation delay nA, nB to nY
CL = 50 pF; V
CC
= 3.3 V
2.6 ns
C
I
Input capacitance 5.0 pF
C
PD
Power dissipation capacitance per gate Notes 1 and 2 28 pF
NOTES:
1. C
PD
is used to determine the dynamic power dissipation
(P
D
in µW)
P
D
= CPD × V
CC
2
× fi  (CL × V
CC
2
× fo) where:
fi = input frequency in MHz; CL = output load capacity in pF; f
o
= output frequency in MHz; VCC = supply voltage in V;
(C
L
× V
CC
2
× fo) = sum of the outputs.
2. The condition is VI = GND to V
CC.
ORDERING INFORMATION
PACKAGES TEMPERATURE RANGE OUTSIDE NORTH AMERICA NORTH AMERICA DWG NUMBER
14-Pin Plastic SO –40°C to +85°C 74LVC08A D 74LVC08A D SOT108-1 14-Pin Plastic SSOP Type II –40°C to +85°C 74LVC08A DB 74LVC08A DB SOT337-1 14-Pin Plastic TSSOP Type I –40°C to +85°C 74LVC08A PW 74LVC08APW DH SOT402-1
PIN CONFIGURATION
14 13 12 11 10
9 87
6
5
4
3
2
1
GND
V
CC
3B 3A 3Y
4Y
4B 4A
1A 1B
2Y
1Y 2A 2B
SY00034
PIN DESCRIPTION
PIN NUMBER SYMBOL NAME AND FUNCTION
1, 4, 9, 12 1A – 4A
p
2, 5, 10, 13 1B – 4B
Data inputs
3, 6, 8, 11 1Y – 4Y Data outputs 7 GND Ground (0 V) 14 V
CC
Positive supply voltage
LOGIC SYMBOL
SV00435
1A 1B
2A 2B
3A
1Y
3B 4A
4B
2Y
3Y
4Y
3
6
8
11
1 2
4 5
9
10 12
13
Philips Semiconductors Product specification
74LVC08AQuad 2-input AND gate
1997 Jun 30
3
LOGIC SYMBOL (IEEE/IEC)
SV00436
1 2
3
4 5
6
8
9
10
11
12 13
&
&
&
&
LOGIC DIAGRAM (ONE GA TE)
SV00415
A
Y
B
FUNCTION T ABLE
INPUTS OUTPUTS
nA nB nY
L L L L H L H L L H H H
NOTES:
H = HIGH voltage level L = LOW voltage level
RECOMMENDED OPERATING CONDITIONS
LIMITS
SYMBOL
PARAMETER
CONDITIONS
MIN MAX
UNIT
V
CC
DC supply voltage (for max. speed performance) 2.7 3.6 V
V
CC
DC supply voltage (for low-voltage applications) 1.2 3.6 V
V
I
DC input voltage range 0 5.5 V
V
O
DC output voltage range; output HIGH or LOW state 0 V
CC
V
T
amb
Operating ambient temperature range in free-air –40 +85 °C
tr, t
f
Input rise and fall times
VCC = 1.2 to 2.7V VCC = 2.7 to 3.6V
0 0
20 10
ns/V
ABSOLUTE MAXIMUM RATINGS
1
In accordance with the Absolute Maximum Rating System (IEC 134). Voltages are referenced to GND (ground = 0V).
SYMBOL
PARAMETER CONDITIONS RATING UNIT
V
CC
DC supply voltage –0.5 to +6.5 V
I
IK
DC input diode current VIt 0 –50 mA
V
I
DC input voltage Note 2 –0.5 to +6.5 V
I
OK
DC output diode current V
O
uVCC or VO t 0
"50
mA
V
O
DC output voltage; output HIGH or LOW state Note 2 –0.5 to VCC +0.5 V
I
O
DC output source or sink current VO = 0 to V
CC
"50
mA
I
GND
, I
CC
DC VCC or GND current
"100
mA
T
stg
Storage temperature range –65 to +150 °C Power dissipation per package
P
TOT
– plastic mini-pack (SO) above +70°C derate linearly with 8 mW/K 500 – plastic shrink mini-pack (SSOP and TSSOP) above +60°C derate linearly with 5.5 mW/K 500
mW
NOTES:
1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability .
2. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
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