Philips 74LVC02APW, 74LVC02ADB, 74LVC02AD Datasheet
INTEGRATED CIRCUITS
74LVC02A
Quad 2-input NOR gate
Product specification
Supersedes data of 1997 Aug 11
IC24 Data Handbook
1998 Apr 28
Philips Semiconductors Product specification
Data inputs
74L VC02AQuad 2-input NOR gate
FEA TURES
•Wide supply range of 1.2V to 3.6V
•Complies with JEDEC standard no. 8-1A
•Inputs accept voltages up to 5.5V
•CMOS low power consumption
•Direct interface with TTL levels
DESCRIPTION
The 74LVC02A is a high performance, low-power, low-voltage,
Si-gate CMOS device and superior to most advanced CMOS
compatible TTL families.
Inputs can be driven from either 3.3 V or 5 V devices. This feature
allows the use of these devices as translators in a mixed 3.3 V/5 V
environment.
The 74LVC02A provides the 2-input NOR function.
•5-volt tolerant inputs, for interfacing with 5-volt logic
QUICK REFERENCE DATA
GND = 0 V; T
SYMBOL
NOTES:
is used to determine the dynamic power dissipation (PD in µW)
1. C
PD
P
= CPD × V
D
fi = input frequency in MHz; CL = output load capacity in pF;
f
= output frequency in MHz; VCC = supply voltage in V;
o
(C
L
2. The condition is VI = GND to V
ORDERING INFORMATION
14-Pin Plastic SO –40°C to +85°C 74LVC02A D 74LVC02A D SOT108-1
14-Pin Plastic SSOP Type II –40°C to +85°C 74LVC02A DB 74LVC02A DB SOT337-1
14-Pin Plastic TSSOP Type I –40°C to +85°C 74LVC02A PW 74LVC02APW DH SOT402-1
= 25°C; tr = tf 2.5 ns
amb
PARAMETER CONDITIONS TYPICAL UNIT
t
PHL
t
PLH
C
I
C
PD
CC
2
× V
× fo) = sum of the outputs.
CC
Propagation delay
nA, nB to nY
CL = 50 pF;
VCC = 3.3 V
2.8 ns
Input capacitance 5.0 pF
Power dissipation capacitance per gate Notes 1 and 2 28 pF
2
× fi (CL × V
CC
CC.
2
× fo) where:
PACKAGES TEMPERATURE RANGE OUTSIDE NORTH AMERICA NORTH AMERICA DWG NUMBER
PIN CONFIGURATION
1
1Y
2
1A
3
1B
4
2Y
5
2A
6
2B
7
GND
14
V
4Y
13
4B
12
4A
11
3Y
10
3B
9
3A8
SV00389
PIN DESCRIPTION
PIN
CC
NUMBER
1, 4, 10, 13 1Y – 4Y Data outputs
2, 5, 8, 11 1A – 4A
3, 6, 9, 12 1B – 4B
7 GND Ground (0 V)
14 V
SYMBOL NAME AND FUNCTION
p
CC
Positive supply voltage
1998 Apr 28 853-2019 19310
2
Philips Semiconductors Product specification
SYMBOL
PARAMETER
CONDITIONS
UNIT
74LVC02AQuad 2-input NOR gate
LOGIC SYMBOL
1A
2
1B
3
2A
5
2B
6
3A
8
3B
9
4A
11
4B
12
LOGIC SYMBOL (IEEE/IEC)
2
3
5
6
8
9
11
12
≥1
≥1
≥1
≥1
1Y
2Y
3Y
4Y
SV00390
SV00391
LOGIC DIAGRAM (ONE GATE)
1
4
10
13
FUNCTION TABLE
nA nB nY
1
NOTES:
4
10
13
H = HIGH voltage level
L = LOW voltage level
A
Y
B
SV00820
INPUTS OUTPUTS
L L H
L H L
H L L
H H L
RECOMMENDED OPERATING CONDITIONS
T
V
V
tr, t
CC
CC
V
V
amb
DC supply voltage (for max. speed performance) 2.7 3.6 V
DC supply voltage (for low-voltage applications) 1.2 3.6 V
DC Input voltage range 0 5.5 V
I
DC output voltage range 0 V
O
Operating ambient temperature range in free-air –40 +85 °C
Input rise and fall times
f
VCC = 1.2 to 2.7V
V
= 2.7 to 3.6V
CC
LIMITS
MIN MAX
CC
0
0
20
10
V
ns/V
1998 Apr 28
3
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