INTEGRATED CIRCUITS
74LV4052
Dual 4-channel analog multiplexer/demultiplexer
Product specification |
1998 Jun 23 |
Supersedes data of 1997 Jul 15
IC24 Data Handbook
m n r
Philips Semiconductors |
Product specification |
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Dual 4-channel analog multiplexer/demultiplexer |
74LV4052 |
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FEATURES
•Optimized for low voltage applications: 1.0 to 6.0 V
•Accepts TTL input levels between VCC = 2.7 V and VCC = 3.6 V
•Low typ ªONº resistance:
60 at Vcc ± VEE = 4.5 V
90 at Vcc ± VEE = 3.0 V
145 at Vcc ± VEE = 2.0 V
•Logic level translation: to enable 3 V logic to communicate with ± 3 V analog signals
•Typical ªbreak before makeº built in
•Analog/Digital multiplexing and demultiplexing
•Signal gating
•Output capability: non-standard
•ICC category: MSI
DESCRIPTION
The 74LV4052 is a low-voltage CMOS device and is pin and function compatible with the 74HC/HCT4052.
The 74LV4052 is a dual 4-channel analog multiplexer/demultiplexer with a common select logic. Each multiplexer has four independent inputs/outputs (nY0 to nY3) and a common input/output (nZ). The common channel select logics include two digital select inputs (S0
and S1) and an active LOW enable input (E).
With E LOW, one of the four switches is selected (low impedance ON-state) by S0 and S1. With E HIGH, all switches are in the high impedance OFF-state, independent of S0 and S1. VCC and GND are
the supply voltage pins for the digital control inputs (S0, S1 and E). The VCC to GND ranges are 1.0 to 6.0 V. The analog inputs/outputs (nY0, to nY3, and nZ) can swing between VCC as a positive limit and VEE as a negative limit. VCC - VEE may not exceed 6.0 V. For operation as a digital multiplexer/demultiplexer, VEE is connected to GND (typically ground).
QUICK REFERENCE DATA
GND = 0 V; Tamb = 25°C; tr =tf ≤ 2.5 ns
SYMBOL |
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PARAMETER |
CONDITIONS |
TYPICAL |
UNIT |
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tPZH/tPZL |
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Turn ªONº time |
CL = 15 pF |
30 |
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E or VOS Sn |
RL = 1K |
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VCC = 3.3 V |
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tPHZ/tPLZ |
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Turn ªOFFº time |
22 |
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E or VOS Sn |
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CI |
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Input capacitance |
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3.5 |
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CPD |
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Power dissipation capacitance per switch |
See Notes 1 and 2 |
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pF |
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CS |
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Maximum switch capacitance |
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5 |
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independent (Y) common (Z) |
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12 |
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NOTES:
1.CPD is used to determine the dynamic power dissipation (PD in mW) PD = CPD × VCC2 × fi ((CL + CS) × VCC2 × fo) where:
fi = input frequency in MHz; CL = output load capacity in pF;
fo = output frequency in MHz; CS = maximum switch capacitance in pF;
VCC = supply voltage in V;
((CL +CS) × VCC2 × fo) = sum of the outputs.
2.The condition is VI = GND to VCC.
ORDERING INFORMATION
PACKAGES |
TEMPERATURE RANGE |
OUTSIDE NORTH AMERICA |
NORTH AMERICA |
Code |
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16-Pin Plastic DIL |
±40°C to +125°C |
74LV4052 N |
74LV4052 N |
SOT38-4 |
16-Pin Plastic SO |
±40°C to +125°C |
74LV4052 D |
74LV4052 D |
SOT109-1 |
16-Pin Plastic SSOP Type II |
±40°C to +125°C |
74LV4052 DB |
74LV4052 DB |
SOT338-1 |
16-Pin Plastic TSSOP Type I |
±40°C to +125°C |
74LV4052 PW |
74LV4052PW DH |
SOT403-1 |
PIN CONFIGURATION |
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PIN DESCRIPTION |
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2Y0 |
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PIN NUMBER |
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SYMBOL |
FUNCTION |
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1 |
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16 |
VCC |
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1, 5, 2, 4 |
2Y0, 2Y3 |
Independent inputs/outputs |
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2Y2 |
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2 |
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15 |
1Y2 |
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6 |
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Enable input (active LOW) |
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E |
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2Z |
3 |
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14 |
1Y1 |
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7 |
VEE |
Negative supply voltage |
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2Y3 |
4 |
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13 |
1Z |
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8 |
GND |
Ground (0 V) |
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2Y1 |
5 |
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12 |
1Y0 |
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10, 9 |
S0, S1 |
Select inputs |
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1Y3 |
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E |
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6 |
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11 |
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S0 |
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12, 14, 15, 11 |
1Y0 to 1Y3 |
Independent inputs/outputs |
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VEE |
7 |
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10 |
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13, 3 |
1Z, 2Z |
Common inputs/outputs |
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S1 |
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GND |
8 |
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9 |
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16 |
VCC |
Positive supply voltage |
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SV01697 |
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1998 Jun 23 |
2 |
853-1999 19618 |
Philips Semiconductors |
Product specification |
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Dual 4-channel analog multiplexer/demultiplexer |
74LV4052 |
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LOGIC SYMBOL
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13 |
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1Z |
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10 |
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S 0 |
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1Y 0 |
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12 |
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1Y 1 |
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14 |
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9 |
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S |
1 |
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1Y |
2 |
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15 |
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1Y 3 |
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11 |
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2Y 0 |
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1 |
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2Y 1 |
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5 |
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2Y 2 |
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2 |
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6 |
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E |
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2Y |
3 |
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4 |
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2Z |
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3 |
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SV01698 |
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FUNCTION TABLE
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INPUTS |
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CHANNEL |
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E |
S1 |
S0 |
ON |
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L |
L |
L |
nY0 ± nZ |
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L |
L |
H |
nY1 ± nZ |
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L |
H |
L |
nY2 ± nZ |
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L |
H |
H |
nY3 ± nZ |
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H |
X |
X |
None |
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NOTES:
1.H = HIGH voltage level
2.L = LOW voltage level
3.X = don't care
LOGIC SYMBOL (IEEE/IEC)
10
0
0
9 4X
1 3
6
G4
1
MDX 0
5
1
3
2
2
4
3
12
14
13
15
11
SV01699
1998 Jun 23 |
3 |
Philips Semiconductors |
Product specification |
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|
Dual 4-channel analog multiplexer/demultiplexer |
74LV4052 |
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FUNCTIONAL DIAGRAM
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16 |
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VCC |
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1Z |
13 |
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1Y 0 |
12 |
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1Y 1 |
14 |
10 |
S0 |
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1Y 2 |
15 |
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1Y 3 |
11 |
9 |
S1 |
1±of±4 |
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LOGIC LEVEL |
2Y 0 |
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CONVERSION |
DECODER |
1 |
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6 |
E |
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2Y 1 |
5 |
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2Y 2 |
2 |
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2Y 3 |
4 |
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2Z |
3 |
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GND |
VEE |
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8 |
7 |
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SV01700 |
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SCHEMATIC DIAGRAM (ONE SWITCH)
Y
VCC 
VEE
VCC |
VCC |
VCC 
VEE
from logic |
Z |
VEE |
SV01695
1998 Jun 23 |
4 |
Philips Semiconductors |
Product specification |
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Dual 4-channel analog multiplexer/demultiplexer |
74LV4052 |
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ABSOLUTE MAXIMUM RATINGS1, 2
In accordance with the Absolute Maximum Rating System (IEC 134).
Voltages are referenced to GND (ground = 0 V).
SYMBOL |
PARAMETER |
CONDITIONS |
RATING |
UNIT |
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VCC |
DC supply voltage |
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±0.5 to +7.0 |
V |
"IIK |
DC input diode current |
VI < ±0.5 or VI > VCC + 0.5 V |
20 |
mA |
"ISK |
DC switch diode current |
VS < ±0.5 or VS > VCC + 0.5 V |
20 |
mA |
"IS |
DC switch current |
±0.5 V < VS < VCC + 0.5 V |
25 |
mA |
Tstg |
Storage temperature range |
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±65 to +150 |
°C |
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Power dissipation per package |
for temperature range: ±40 to +125°C |
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PTOT |
± plastic DIL |
above +70°C derate linearly with 12 mW/K |
750 |
mW |
± plastic mini-pack (SO) |
above +70°C derate linearly with 8 mW/K |
500 |
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± plastic shrink mini-pack (SSOP and TSSOP) |
above +60°C derate linearly with 5.5 mW/K |
400 |
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NOTES:
1.Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under ªrecommended operating conditionsº is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
2.The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
RECOMMENDED OPERATING CONDITIONS
SYMBOL |
PARAMETER |
CONDITIONS |
MIN |
TYP |
MAX |
UNIT |
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VCC |
DC supply voltage |
See Note 1 and Figure 5 |
1.0 |
3.3 |
6.0 |
V |
VI |
Input voltage |
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0 |
± |
VCC |
V |
VO |
Output voltage |
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0 |
± |
VCC |
V |
Tamb |
Operating ambient temperature range in free air |
See DC and AC |
±40 |
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+85 |
°C |
characteristics |
±40 |
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+125 |
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VCC = 1.0 V to 2.0 V |
± |
± |
500 |
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tr, tf |
Input rise and fall times |
VCC = 2.0 V to 2.7 V |
± |
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200 |
ns/V |
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VCC = 2.7 V to 6.0 V |
± |
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100 |
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NOTE:
1. The LV is guaranteed to function down to VCC = 1.0V (input levels GND or VCC); DC characteristics are guaranteed from VCC = 1.2V to VCC = 6.0V.
1998 Jun 23 |
5 |
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