Philips 74LV377PW, 74LV377N, 74LV377DB, 74LV377D Datasheet
INTEGRATED CIRCUITS
74LV377
Octal D-type flip-flop with data enable;
positive edge-trigger
Product specification
Supersedes data of 1997 Mar 04
IC24 Data Handbook
1998 Jun 10
Philips Semiconductors Product specification
OPERATING MODES
Octal D-type flip-flop with data enable;
positive edge-trigger
FEA TURES
•Optimized for Low Voltage applications: 1.0 to 3.6V
•Accepts TTL input levels between V
•Typical V
T
amb
•Typical V
T
amb
(output ground bounce) 0.8V @ VCC = 3.3V,
OLP
= 25°C
(output VOH undershoot) 2V @ VCC = 3.3V,
OHV
= 25°C
•Ideal for addressable register applications
•Data enable for address and data synchronization applications
•Eight positive-edge triggered D-type flip-flops
•Output capability: standard
•I
category: MSI
CC
QUICK REFERENCE DATA
GND = 0V; T
SYMBOL
t
PHL/tPLH
f
max
C
I
C
PD
NOTES:
is used to determine the dynamic power dissipation (PD in µW)
1. C
PD
= CPD V
P
D
f
= input frequency in MHz; CL = output load capacity in pF;
i
= output frequency in MHz; VCC = supply voltage in V;
f
o
(C
2. The condition is V
= 25°C; tr = tf 2.5 ns
amb
CC
2
V
L
fo) = sum of the outputs.
CC
Propagation delay
CP to Q
n
Maximum clock frequency
Input capacitance 3.5 pF
Power dissipation capacitance per flip-flop Notes 1 and 2 20 pF
2
fi (CL V
= GND to V
I
= 2.7V and VCC = 3.6V
CC
PARAMETER CONDITIONS TYPICAL UNIT
CL = 15pF
VCC = 3.3V
2
fo) where:
CC
CC
74L V377
DESCRIPTION
The 74LV377 is a low–voltage CMOS device and is pin and function
compatible with 74HC/HCT377.
The 74LV377 has eight edge-triggered, D-type flip-flops with
individual D inputs and Q outputs. A common clock (CP) input loads
all flip-flops simultaneously when the data enable (E
state of each D input, one set-up time before the LOW-to-HIGH
clock transition, is transferred to the corresponding output (Q
the flip-flop. The E
the LOW-to-HIGH transition for predictable operation.
input must be stable only one set-up time prior to
13 ns
77 MHz
) is LOW. The
) of
n
ORDERING INFORMATION
PACKAGES TEMPERATURE RANGE OUTSIDE NORTH AMERICA NORTH AMERICA PKG. DWG. #
20-Pin Plastic DIL –40°C to +125°C 74LV377 N 74LV377 N SOT146-1
20-Pin Plastic SO –40°C to +125°C 74LV377 D 74LV377 D SOT163-1
20-Pin Plastic SSOP Type II –40°C to +125°C 74LV377 DB 74LV377 DB SOT339-1
20-Pin Plastic TSSOP Type I –40°C to +125°C 74LV377 PW 74LV377PW DH SOT360-1
PIN DESCRIPTION
PIN
NUMBER
1 E Data enable input (active-LOW)
2, 5, 6, 9, 12,
15, 16, 19
3, 4, 7, 8, 13,
14, 17, 18
10 GND Ground (0V)
11 CP
20 V
SYMBOL FUNCTION
Q0 to Q
D0 to D
CC
flip-flop outputs
7
Data inputs
7
Clock input
(LOW-to-HIGH, edge-triggered)
Positive supply voltage
FUNCTION TABLE
INPUTS OUTPUTS
CP E D
Load ‘‘1’’ ↑ l h H
Load ‘‘0’’ ↑ l l L
Hold (do nothing)
H = HIGH voltage level
h = HIGH voltage level one set-up time prior to the
LOW-to-HIGH CP transition
L = LOW voltage level
l = LOW voltage level one set-up time prior to the
LOW-to-HIGH CP transition
↑ = LOW–to–HIGH CP transition
X = Don’t care
↑
X
H
n
h
X
No change
X
No change
Q
n
1998 Jun 10 853–1935 19545
2
Philips Semiconductors Product specification
Octal D-type flip-flop with data enable;
positive edge-trigger
PIN CONFIGURATION
GND
1
E
2
Q
0
3
D
0
4
D
1
5
Q
1
6
Q
2
7
D
2
8
D
3
9
Q
3
10
20
V
CC
19
Q
7
18
D
7
17
D
6
16
Q
6
15
Q
5
14
D
5
13
D
4
Q
12
4
11
CP
LOGIC SYMBOL (IEEE/IEC)
11
1
3
4
7
8
13
14
17
18
1C2
G1
2D
74LV377
2
5
6
9
12
15
16
19
LOGIC SYMBOL
3
4
89
13
17 16
18
SV00667
SV00669
FUNCTIONAL DIAGRAM
11
CP
D
0
D
1
D
2
D
3
D
4
D
5
D
6
D
7
Q
0
Q
1
Q
2
Q
3
Q
4
Q
5
Q
6
Q
7
E
2
5
67
12
1514
19
1
SV00668
D
D
D
D
D
D
D
D
E
CP
0
1
2
3
4
5
6
7
FF1
FF8
to
OUTPUTS
3
4
7
8
13
14
17
18
1
11
Q
0
2
Q
1
5
Q
2
6
Q
3
9
Q
4
12
Q
5
15
Q
6
16
Q
7
19
SV00670
1998 Jun 10
3
Philips Semiconductors Product specification
P
mW
Octal D-type flip-flop with data enable;
positive edge-trigger
RECOMMENDED OPERATING CONDITIONS
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNIT
V
CC
V
V
T
amb
tr, t
NOTE:
1. The LV is guaranteed to function down to V
ABSOLUTE MAXIMUM RATINGS
In accordance with the Absolute Maximum Rating System (IEC 134).
Voltages are referenced to GND (ground = 0V).
SYMBOL
V
±I
±I
±I
DC supply voltage See Note 1 1.0 3.3 3.6 V
Input voltage 0 – V
I
Output voltage 0 – V
O
Operating ambient temperature range in free air
Input rise and fall times
f
CC
See DC and AC
characteristics
VCC = 1.0V to 2.0V
VCC = 2.0V to 2.7V
V
= 2.7V to 3.6V
CC
= 1.0V (input levels GND or VCC); DC characteristics are guaranteed from VCC = 1.2V to VCC = 3.6V.
–40
–40
–
–
–
–
–
–
–
1, 2
PARAMETER CONDITIONS RATING UNIT
DC supply voltage –0.5 to +4.6 V
CC
DC input diode current VI < –0.5 or VI > VCC + 0.5V 20 mA
IK
DC output diode current VO < –0.5 or VO > VCC + 0.5V 50 mA
OK
DC output source or sink current
O
– standard outputs
–0.5V < VO < VCC + 0.5V 25 mA
74LV377
CC
CC
+85
+125
500
200
100
V
V
°C
ns/V
±I
GND
±I
T
stg
DC VCC or GND current for types with
,
–standard outputs
CC
Storage temperature range –65 to +150 °C
50 mA
Power dissipation per package for temperature range: –40 to +125°C
–plastic DIL above +70°C derate linearly with 12mW/K 750
tot
–plastic mini-pack (SO) above +70°C derate linearly with 8 mW/K 500
–plastic shrink mini-pack (SSOP and TSSOP) above +60°C derate linearly with 5.5 mW/K 400
NOTES:
1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the
device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability .
2. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
1998 Jun 10
4
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