Philips 74lv32 DATASHEETS
INTEGRATED CIRCUITS
74LV32
Quad 2-input OR gate
Product specification
Supersedes data of 1997 Feb 03
IC24 Data Handbook
1998 Apr 20
Philips Semiconductors Product specification
Quad 2-input OR gate
FEA TURES
•Wide operating voltage: 1.0 to 5.5 V
•Optimized for Low Voltage applications: 1.0 to 3.6 V
•Accepts TTL input levels between V
•Typical V
T
amb
•Typical V
T
AMB
(output ground bounce) < 0.8 V at VCC = 3.3 V,
OLP
= 25°C.
(output VOH undershoot) > 2 V at VCC = 3.3 V,
OHV
= 25°C.
•Output capability: standard
•I
category: SSI
CC
QUICK REFERENCE DATA
GND = 0 V; T
SYMBOL
t
NOTES:
1. C
is used to determine the dynamic power dissipation (PD in µW)
PD
= CPD × V
P
D
f
= input frequency in MHz; CL = output load capacitance in pF;
i
= output frequency in MHz; VCC = supply voltage in V;
f
o
(C
L
= 25°C; tr = tf ≤ 2.5 ns
amb
PHL/tPLH
C
I
C
PD
2
× fi (CL × V
CC
2
× V
× fo) = sum of the outputs.
CC
Propagation delay
nA, nB to nY
Input capacitance 3.5 pF
Power dissipation capacitance per gate VI = GND to V
= 2.7 V and VCC = 3.6 V
CC
PARAMETER CONDITIONS TYPICAL UNIT
2
× fo) where:
CC
DESCRIPTION
The 74LV32 is a low-voltage Si-gate CMOS device and is pin and
function compatible with 74HC/HCT32.
The 74LV32 provides the 2-input OR function.
CL = 15 pF;
VCC = 3.3 V
CC
1
6 ns
16 pF
74L V32
ORDERING INFORMATION
PACKAGES TEMPERATURE RANGE OUTSIDE NORTH AMERICA NORTH AMERICA PKG. DWG. #
14-Pin Plastic DIL –40°C to +125°C 74LV32 N 74LV32 N SOT27-1
14-Pin Plastic SO –40°C to +125°C 74LV32 D 74LV32 D SOT108-1
14-Pin Plastic SSOP Type II –40°C to +125°C 74LV32 DB 74LV32 DB SOT337-1
14-Pin Plastic TSSOP Type I –40°C to +125°C 74LV32 PW 74LV32PW DH SOT402-1
PIN DESCRIPTION
PIN NUMBER SYMBOL NAME AND FUNCTION
1, 4, 9, 12 1A – 4A Data inputs
2, 5, 10, 13 1B – 4B Data inputs
3, 6, 8, 11 1Y – 4Y Data Outputs
7 GND Ground (0 V)
14 V
CC
Positive supply voltage
FUNCTION TABLE
INPUTS OUTPUTS
nA nB nY
L L L
L H H
H L H
H H H
H = HIGH voltage level
L = LOW voltage level
1998 Apr 20 853-1897 19258
2
Philips Semiconductors Product specification
Quad 2-input OR gate
PIN CONFIGURATION
1
1A
2
1B
3
1Y
4
2A
5
2B
6
2Y
GND
7
LOGIC SYMBOL (IEEE/IEC)
1
2
≥1
14
13
12
11
10
9
8
SV00450
3
74LV32
LOGIC SYMBOL
1A
V
CC
4B
4A
4Y
3B
3A
3Y
LOGIC DIAGRAM (ONE GATE)
1
1B
2
2A
4
5
2B
9
3A
3B
10
4A
12
13
4B
1Y
2Y
3Y
4Y
SV00452
3
6
8
11
4
5
9
10
12
13
≥1
≥1
≥1
6
8
11
SV00453
A
B
Y
SV00454
RECOMMENDED OPERA TING CONDITIONS
SYMBOL PARAMETER CONDITIONS MIN TYP. MAX UNIT
V
V
V
T
amb
tr, t
NOTE:
1. The LV is guaranteed to function down to V
DC supply voltage See Note1 1.0 3.3 5.5 V
CC
Input voltage 0 – V
I
Output voltage 0 – V
O
Operating ambient temperature range in free air
Input rise and fall times
f
CC
See DC and AC
characteristics
VCC = 1.0V to 2.0V
VCC = 2.0V to 2.7V
VCC = 2.7V to 3.6V
VCC = 3.6V to 5.5V
= 1.0V (input levels GND or VCC); DC characteristics are guaranteed from VCC = 1.2V to VCC = 5.5V.
–40
–40
–
–
–
–
–
–
–
CC
CC
+85
+125
500
200
100
50
ns/V
V
V
°C
1998 Apr 20
3
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