Philips 74LV259PW, 74LV259N, 74LV259DB, 74LV259D Datasheet

INTEGRATED CIRCUITS

74LV259

8-bit addressable latch

Product specification Supersedes data of 1997 Jun 06 IC24 Data Handbook

 

1998 May 20

Philips Semiconductors Product specification

74L V2598-bit addressable latch

FEA TURES

•Optimized for low voltage applications: 1.0 to 3.6 V

•Accepts TTL input levels between V

•Typical V

amb

•Typical V

amb

(output ground bounce) < 0.8 V at V

OLP

= 25°C

(output VOH undershoot) > 2 V at V

OHV

= 25°C

= 2.7 V and V

•Combines demultiplexer and 8-bit latch

•Serial-to-parallel capability

•Output from each storage bit available

•Random (addressable) data entry

•Easily expandable

•Common reset input

•Useful as a 3-to-8 active HIGH decoder

•Output capability: standard

•I

category: MSI

QUICK REFERENCE DATA

GND = 0 V; T

SYMBOL

PHL/tPLH

NOTE:

1. C

is used to determine the dynamic power dissipation (PD in µW)

= CPD × V

= input frequency in MHz; CL = output load capacity in pF;

= output frequency in MHz; VCC = supply voltage in V;

 (C

= 25°C; tr = t

amb

Propagation delay D, An to Q LE to Q

MR to Q Input capacitance 3.5 pF Power dissipation capacitance per latch VI = GND to V

× fi  (CL × V

× V

× fo) = sum of the outputs.

≤ 2.5 ns

PARAMETER CONDITIONS TYPICAL UNIT

× fo) where:

= 3.6 V

= 3.3 V,

CL = 15 pF; VCC = 3.3 V

DESCRIPTION

The 74LV259 is a low-voltage CMOS device and is pin and function compatible with 74HC/HCT259.

The 74LV259 is a high-speed 8-bit addressable latch designed for general purpose storage applications in digital systems. The 74LV259 is a multifunction device capable of storing single-line data in eight addressable latches, and also 3-to-8 decoder and demultiplexer , with active HIGH outputs (Q available. The 74L V259 also incorporate an active LOW common reset (MR input (LE the mode select table. In the addressable latch mode, data on the data line (D) is written into the addressed latch. The addressed latch will follow the data input with all non-addressed latches remaining in their previous states. In the memory mode, all latches remain in their previous states and are unaffected by the data or address inputs.

In the 3-to-8 decoding or demultiplexing mode, the addressed output follows the state of the D input with all other outputs in the LOW state. In the reset mode all outputs are LOW and unaffected by the address (A as an addressable latch, changing more than one bit of address could impose a transient-wrong address. Therefore, this should only be done while in the memory mode. The mode select table summarizes the operations of the 74LV259.

) for resetting all latches, as well as an active LOW enable

). The 74LV259 has four modes of operation as shown in

to A2) and date (D) input. When operating the 74LV259

to Q7), functions are

17 16 14

19 pF

ORDERING INFORMATION

PACKAGES TEMPERATURE RANGE OUTSIDE NORTH AMERICA NORTH AMERICA PKG. DWG. #

16-Pin Plastic DIL –40°C to +125°C 74LV259 N 74LV259 N SOT38-4 16-Pin Plastic SO –40°C to +125°C 74LV259 D 74LV259 D SOT109-1 16-Pin Plastic SSOP Type II –40°C to +125°C 74LV259 DB 74LV259 DB SOT338-1 16-Pin Plastic TSSOP Type I –40°C to +125°C 74LV259 PW 74LV259PW DH SOT403-1

1998 May 20 853-1988 19420

Philips Semiconductors Product specification

74LV2598-bit addressable latch

PIN CONFIGURATION

GND

LOGIC SYMBOL

1 2 3

PIN DESCRIPTION

SV01602

NUMBER

1, 2, 3 A0 to A2Address inputs 4, 5, 6, 7, 9,

10, 11, 12 8 GND Ground (0 V)

13 D Data input 14 LE Latch enable input (active LOW) 15 MR Conditional reset input (active LOW) 16 V

SYMBOL FUNCTION

Q0 to Q7Latch outputs

Positive supply voltage

LOGIC SYMBOL (IEEE/IEC)

Q Q Q Q

SV01601

4 5 6 7 9 10 11 12

9, 10D

2 3

1 C10

0 7

SV01603

FUNCTIONAL DIAGRAM

1-of–8

DECODER

1998 May 20

8 LATCHES

SV01604

MODE SELECT TABLE

LE MR MODE

L H Addressable latch

H H Memory

L L Active HIGH 8-channel demultiplexer

H L Reset

Philips Semiconductors Product specification

OPERATING MODES

ltipl

(

)

()

(when D = H)

Addressable latch

74LV2598-bit addressable latch

FUNCTION TABLE

INPUTS OUTPUTS

MR LE D A

Master reset L H X X X X L L L L L L L L

L L d L L L Q=d L L L L L L L L L d H L L L Q=d L L L L L L L L d L H L L L Q=d L L L L L

emu

active HIGH

decoder

L L d H H L L L L Q=d L L L L L L d L L H L L L L Q=d L L L L L d H L H L L L L L Q=d L L L L d L H H L L L L L L Q=d L L L d H H H L L L L L L L Q=d

Store (do nothing) H H X X X X q0 q1 q2 q3 q4 q5 q6 q7

H L d L L L Q=d q1 q2 q3 q4 q5 q6 q7 H L d H L L q0 Q=d q2 q3 q4 q5 q6 q7 H L d L H L q0 q1 Q=d q3 q4 q5 q6 q7 H L d H H L q0 q1 q2 Q=d q4 q5 q6 q7 H L d L L H q0 q1 q2 q3 Q=d q5 q6 q7 H L d H L H q0 q1 q2 q3 q4 Q=d q6 q7 H L d L H H q0 q1 q2 q3 q4 q5 Q=q q7 H L d H H H q0 q1 q2 q3 q4 q5 q6 Q=d

NOTES:

H = HIGH voltage level L = LOW voltage level X = don’t care d = HIGH or LOW data one set-up time prior to the LOW-to-HIGH LE q = lower case letters indicate the state of the referenced output established during the last cycle established during the last cycle in which

it was addressed or cleared

transition

RECOMMENDED OPERATING CONDITIONS

SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNIT

amb

tr, t

NOTE:

1. The LV is guaranteed to function down to V

1998 May 20

DC supply voltage See Note 1 1.0 3.3 3.6 V Input voltage 0 – V Output voltage 0 – V

Operating ambient temperature range in free air

Input rise and fall times

= 1.0V (input levels GND or VCC); DC characteristics are guaranteed from VCC = 1.2V to VCC = 5.5V.

See DC and AC

characteristics

VCC = 1.0V to 2.0V VCC = 2.0V to 2.7V VCC = 2.7V to 3.6V

–40 –40

– – –

CC CC

+85

+125

500 200 100

ns/V

V V

°C

Philips Semiconductors Product specification

voltage

74LV2598-bit addressable latch

ABSOLUTE MAXIMUM RATINGS

1, 2

In accordance with the Absolute Maximum Rating System (IEC 134). Voltages are referenced to GND (ground = 0 V).

SYMBOL

I

GND

I

stg

TOT

DC supply voltage –0.5 to +4.6 V DC input diode current VI < –0.5 or VI > VCC + 0.5V 20 mA DC output diode current VO < –0.5 or VO > VCC + 0.5V 50 mA DC output source or sink current

– standard outputs DC VCC or GND current for types with

– standard outputs Storage temperature range –65 to +150 °C

Power dissipation per package – plastic DIL – plastic mini-pack (SO) – plastic shrink mini-pack (SSOP and TSSOP)

PARAMETER CONDITIONS RATING UNIT

–0.5V < VO < VCC + 0.5V 25 mA

50 mA

for temperature range: –40 to +125°C above +70°C derate linearly with 12 mW/K above +70°C derate linearly with 8 mW/K above +60°C derate linearly with 5.5 mW/K

750 500 400

NOTES:

1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability .

2. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.

DC ELECTRICAL CHARACTERISTICS

Over recommended operating conditions. V oltages are referenced to GND (ground = 0 V).

LIMITS

SYMBOL P ARAMETER TEST CONDITIONS

VCC = 1.2 V 0.9 0.9

HIGH level Input

VCC = 2.0 V 1.4 1.4 VCC = 2.7 to 3.6 V 2.0 2.0 VCC = 1.2 V 0.3 0.3

LOW level Input

VCC = 2.0 V 0.6 0.6 VCC = 2.7 to 3.6 V 0.8 0.8

–IO = 100µA 1.2

IL;

–IO = 100µA 1.8 2.0 1.8

IL;

–IO = 100µA 2.5 2.7 2.5

IL;

–IO = 100µA 2.8 3.0 2.8

IL;

HIGH level output voltage; all outputs

VCC = 1.2 V; VI = VIH or V VCC = 2.0 V; VI = VIH or V VCC = 2.7 V; VI = VIH or V VCC = 3.0 V; VI = VIH or V

HIGH level output

voltage; STANDARD

VCC = 3.0 V; VI = VIH or V

–IO = 6mA 2.40 2.82 2.20 V

IL;

outputs

IO = 100µA 0

IL;

IO = 100µA 0 0.2 0.2

IL;

IO = 100µA 0 0.2 0.2

IL;

IO = 100µA 0 0.2 0.2

IL;

LOW level output

voltage; all outputs

VCC = 1.2 V; VI = VIH or V VCC = 2.0 V; VI = VIH or V VCC = 2.7 V; VI = VIH or V VCC = 3.0 V; VI = VIH or V

LOW level output

voltage; STANDARD

VCC = 3.0 V; VI = VIH or V

IO = 6mA 0.25 0.40 0.50 V

IL;

outputs

-40°C to +85°C -40°C to +125°C

MIN TYP

MAX MIN MAX

UNIT

1998 May 20

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