Philips 74LV257PW, 74LV257N, 74LV257DB, 74LV257D Datasheet

INTEGRATED CIRCUITS

74LV257

Quad 2-input multiplexer (3-State)

Product specification
Supersedes data of 1997 Jun 06
IC24 Data Handbook




1998 May 20

Philips Semiconductors Product specification

74L V257Quad 2-input multiplexer (3-State)

FEA TURES

•Optimized for low voltage applications: 1.0 to 3.6 V

•Accepts TTL input levels between V

•Typical V

T

amb

•Typical V

T

amb

(output ground bounce) < 0.8 V at V

OLP

= 25°C

(output VOH undershoot) > 2 V at V

OHV

= 25°C

= 2.7 V and V

CC

CC

CC

CC

= 3.3 V,

= 3.3 V,

•Non-inverting data path

•Output capability: bus driver

•I

category: MSI

CC

QUICK REFERENCE DATA

GND = 0 V; T

= 25°C; tr = t

amb

SYMBOL

Propagation delay

t

PHL/tPLH

C

I

C

PD

nl0, nl1 to nY
S to nY

Input capacitance 3.5 pF
Power dissipation capacitance per gate VI = GND to V

NOTE:

1. C

is used to determine the dynamic power dissipation (PD in µW)

PD

= CPD × V

P

D

f

= input frequency in MHz; CL = output load capacitance in pF;

i

= output frequency in MHz; VCC = supply voltage in V;

f

o

 (C

× V

L

2

× fi  (CL × V

CC

2

× fo) = sum of the outputs.

CC

≤ 2.5 ns

f

PARAMETER CONDITIONS TYPICAL UNIT

2

× fo) where:

CC

= 3.6 V

CL = 15 pF;
VCC = 3.3 V

DESCRIPTION

The 74LV257 is a low-voltage Si-gate CMOS device and is pin and
function compatible with 74HC/HCT257.

The 74LV257 is a quad 2-input multiplexer with 3-state outputs, which
select 4 bits of data from two sources and are controlled by a common
data select input (S). The data inputs from source 0 (1l
selected when input S is LOW and the data inputs from source 1 (1l
to 4l1) are selected when S in HIGH. Data appears at the outputs (1Y
to 4Y) in true (non-inverting) from the selected inputs. The 74LV257 is
the logic implementation of a 4-pole, 2-position switch, where the
position of the switch is determined by the logic levels applied to S.
The outputs are forced to a high impedance OFF-state when OE
HIGH.

The logic equations for the outputs are:
1Y = OE
2Y = OE
3Y = OE
4Y = OE

× (1l1 × S + 1l0 × S)
× (2l1 × S + 2l0 × S)
× (3l1 × S + 3l0 × S)
× (4l1 × S + 4l0 × S)

10
14

CC

1

30 pF

to 4l0) are

0

ns

1

is

ORDERING INFORMATION

PACKAGES TEMPERATURE RANGE OUTSIDE NORTH AMERICA NORTH AMERICA PKG. DWG. #

16-Pin Plastic DIL –40°C to +125°C 74LV257 N 74LV257 N SOT38-4
16-Pin Plastic SO –40°C to +125°C 74LV257 D 74LV257 D SOT109-1
16-Pin Plastic SSOP Type II –40°C to +125°C 74LV257 DB 74LV257 DB SOT338-1
16-Pin Plastic TSSOP Type I –40°C to +125°C 74LV257 PW 74LV257PW DH SOT403-1

PIN CONFIGURATION

1

S

2

1I

0

3

1I

1

4

IY

5

2l

0

6

2l

1

7

2Y

8

GND

1998 May 20 853-1985 19420

16

15

14

13

12

11

10

9

SV00636

V

OE

4l

4l

4Y

3l

3l

3Y

CC

0

1

0

1

PIN DESCRIPTION

PIN

NUMBER

1 S Common data select input
2, 5, 11, 14 1l0 to 4l0Data inputs from source 0
3, 6, 10, 13 1l1 to 4l1Data inputs from source 1
4, 7, 9, 12 1Y to 4Y 3-state multiplexer outputs
8 GND Ground (0 V)

15 OE
16 V

2

SYMBOL FUNCTION

3-State output enable input
(active LOW)

CC

Positive supply voltage

Philips Semiconductors Product specification

74LV257Quad 2-input multiplexer (3-State)

LOGIC SYMBOL

2

35

1I

2I

11I2I

0

0

1
15

S
OE

1Y

4

LOGIC SYMBOL (IEEE/IEC)

1

15

2

3

5

6

11

10

14

13

G1

EN

MUX

1

1

FUNCTIONAL DIAGRAM

6

10

1411

13

2

1I

0

3I

4I

3I14I

0

1

2Y

3Y

7

0

1

4Y

12

9

SV00637

3

1I

1

5

2I

0

6

2I

1

11

3I

10

3I

14

4I

13

4I

SELECTOR

0
1

0

1

S

115

3–STATE

MULTIPLEXER

OUTPUTS

OE

1Y

2Y

3Y

4Y

SV00639

4

7

9

12

FUNCTION TABLE

INPUTS OUTPUTS

0

nl

1

nY

12

SV00638

4

OE S nl

H X X X Z

7

L H X L L
L H X H H
L L L X L

9

L L H X H

NOTES:

H = HIGH voltage level
L = LOW voltage level
X = don’t care
Z = high impedance OFF-state

LOGIC DIAGRAM

1I

1

1I0

2I

1

2I

0

3I

1

3I

0

4I

1

4I

0

OE

S

1998 May 20

1Y

2Y

3Y

4Y

SV00640

3

Philips Semiconductors Product specification

74LV257Quad 2-input multiplexer (3-State)

RECOMMENDED OPERATING CONDITIONS

SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNIT

T

V

V

V

amb

tr, t

DC supply voltage See Note 1 1.0 3.3 3.6 V

CC

Input voltage 0 – V

I

Output voltage 0 – V

O

Operating ambient temperature range in free air

Input rise and fall times

f

See DC and AC

characteristics

VCC = 1.0V to 2.0V
VCC = 2.0V to 2.7V
VCC = 2.7V to 3.6V

–40
–40

–
–
–

–
–
–

CC
CC

+85

+125

500
200
100

V
V

°C

ns/V

NOTE:

1. The LV is guaranteed to function down to V

ABSOLUTE MAXIMUM RATINGS

= 1.0V (input levels GND or VCC); DC characteristics are guaranteed from VCC = 1.2V to VCC =3.6V.

CC

1, 2

In accordance with the Absolute Maximum Rating System (IEC 134).
Voltages are referenced to GND (ground = 0 V).

SYMBOL

V

CC

I

IK

I

OK

I

O

I

GND

I

CC

T

stg

P

TOT

DC supply voltage –0.5 to +4.6 V
DC input diode current VI < –0.5 or VI > VCC + 0.5V 20 mA
DC output diode current VO < –0.5 or VO > VCC + 0.5V 50 mA
DC output source or sink current

– bus driver outputs

DC VCC or GND current for types with

,

– bus driver outputs

Storage temperature range –65 to +150 °C
Power dissipation per package

– plastic DIL
– plastic mini-pack (SO)
– plastic shrink mini-pack (SSOP and TSSOP)

PARAMETER CONDITIONS RATING UNIT

–0.5V < VO < VCC + 0.5V 35 mA

70 mA

for temperature range: –40 to +125°C
above +70°C derate linearly with 12 mW/K
above +70°C derate linearly with 8 mW/K
above +60°C derate linearly with 5.5 mW/K

750
500
400

mW

NOTES:

1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the
device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability .

2. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.

1998 May 20

4