Philips 74lv20 DATASHEETS

INTEGRATED CIRCUITS

74LV20

Dual 4-input NAND gate

Product specification
Supersedes data of 1997 Mar 28
IC24 Data Handbook

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1998 Apr 20

Philips Semiconductors Product specification

Dual 4-input NAND gate

FEA TURES

•Optimized for Low Voltage applications: 1.0 to 3.6V

•Accepts TTL input levels between V

•Typical V

T

amb

•Typical V

T

amb

(output ground bounce)  0.8V @ VCC = 3.3V,

OLP

= 25°C

(output VOH undershoot)  2V @ VCC = 3.3V,

OHV

= 25°C

•Output capability: standard

•I

category: SSI

CC

QUICK REFERENCE DATA

GND = 0V; T

SYMBOL

t

PHL/tPLH

C

I

C

PD

NOTES:

1C

is used to determine the dynamic power dissipation (PD in µW)

PD

= CPD  V

P

D

= input frequency in MHz; CL = output load capacitance in pF;

f

i

f

= output frequency in MHz; VCC = supply voltage in V;

o

 (C

2 The condition is V

= 25°C; tr =tf 2.5 ns

amb

CC

2

 V

L

 fo) = sum of the outputs.

CC

Propagation delay
nA, nB, nC, nD to nY

Input capacitance 3.5 pF
Power dissipation capacitance per gate Notes 1 and 2 22 pF

2

x fi  (CL  V

= GND to V

I

= 2.7V and VCC = 3.6V

CC

PARAMETER CONDITIONS TYPICAL UNIT

2

 fo) where:

CC

CC

DESCRIPTION

The 74LV20 is a low–voltage Si–gate CMOS device and is pin and
function compatible with 74HC/HCT20.

The 74LV20 provides the 4–input NAND function.

CL = 15pF
VCC = 3.3V

8 ns

74L V20

ORDERING INFORMATION

PACKAGES TEMPERATURE RANGE OUTSIDE NORTH AMERICA NORTH AMERICA PKG. DWG. #

14-Pin Plastic DIL –40°C to +125°C 74LV20 N 74LV20 N SOT27-1
14-Pin Plastic SO –40°C to +125°C 74LV20 D 74LV20 D SOT108-1
14-Pin Plastic SSOP Type II –40°C to +125°C 74LV20 DB 74LV20 DB SOT337-1
14-Pin Plastic TSSOP Type I –40°C to +125°C 74L V20 PW 74LV20PW DH SOT402-1

PIN DESCRIPTION

PIN

NUMBER

1, 9 1A to 2A Data inputs
2, 10 1B to 2B Data inputs
3, 11 NC No connection
4, 12 1C to 2C Data inputs
5, 13 1D to 2D Data inputs
6, 8 1Y to 2Y Data outputs
7 GND Ground (0V)
14 V

SYMBOL FUNCTION

CC

Positive supply voltage

FUNCTION TABLE

INPUTS OUTPUTS

nA nB nC nD nY

L X X X H
X L X X H
X X L X H
X X X L H

H H H H L

NOTES:

H = HIGH voltage level
L = LOW voltage level
X = Don’t care

1998 Apr 20 853–1962 19256

2

Philips Semiconductors Product specification

Dual 4-input NAND gate

PIN CONFIGURATION

1

1A

2

1B

3

NC

4

1C

5

1D

6

1Y

GND

74LV20

LOGIC SYMBOL

1A

14

V

CC

13

2D

12

2C

11

NC

2B

10

2A

9

2Y

87

1

1B

2

1C

4

1D

5

2A

9

2B

10

2C

12

2D

13

1Y

6

2Y

8

LOGIC SYMBOL (IEEE/IEC)

1

2

4

5

9

10

12

13

&

&

SV00360

SV00362

SV00361

LOGIC DIAGRAM

A

6

8

B

Y

C

D

SV00363

1998 Apr 20

3

Philips Semiconductors Product specification

Dual 4-input NAND gate

74LV20

RECOMMENDED OPERATING CONDITIONS

SYMBOL PARAMETER CONDITIONS MIN TYP. MAX UNIT

V

CC

V

V

T

amb

tr, t

NOTES:

1 The LV is guaranteed to function down to V

ABSOLUTE MAXIMUM RATINGS

In accordance with the Absolute Maximum Rating System (IEC 134)
Voltages are referenced to GND (ground = 0V)

SYMBOL

V

CC

±I

IK

±I

OK

±I

O

DC supply voltage See Note1 1.0 3.3 3.6 V
Input voltage 0 – V

I

Output voltage 0 – V

O

Operating ambient temperature range in free
air

Input rise and fall times

f

= 1.0V (input levels GND or VCC); DC characteristics are guaranteed from VCC = 1.2V to VCC = 3.6V.

CC

See DC and AC
characteristics

VCC = 1.0V to 2.0V
VCC = 2.0V to 2.7V
VCC = 2.7V to 3.6V

–40
–40

–
–
–

+85

+125

–
–
–
–

500
200
100

1, 2

PARAMETER CONDITIONS RATING UNIT

DC supply voltage –0.5 to +4.6 V
DC input diode current VI < –0.5 or VI > VCC + 0.5V 20 mA
DC output diode current VO < –0.5 or VO > VCC + 0.5V 50 mA
DC output source or sink current

– standard outputs

–0.5V < VO < VCC + 0.5V

25

CC
CC

V
V

°C

ns/V

mA

±I

GND

±I

CC

T

stg

P

TOT

DC VCC or GND current for types with

,

–standard outputs 50
Storage temperature range –65 to +150 °C

Power dissipation per package
–plastic DIL
–plastic mini-pack (SO)
–plastic shrink mini-pack (SSOP and TSSOP)

for temperature range: –40 to +125°C
above +70°C derate linearly with 12mW/K
above +70°C derate linearly with 8 mW/K
above +60°C derate linearly with 5.5 mW/K

750
500
400

mA

mW

NOTES:

1 Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the

device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability .

2 The input and output voltage ratings may be exceeded if the input and output current ratings are observed.

1998 Apr 20

4