INTEGRATED CIRCUITS
74LV153
Dual 4-input multiplexer
Product specification |
1998 Apr 28 |
Supersedes data of 1997 Feb 12
IC24 Data Handbook
m n r
Philips Semiconductors |
Product specification |
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Dual 4-input multiplexer |
74LV153 |
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FEATURES
•Optimized for low voltage applications: 1.0 to 3.6 V
•Accepts TTL input levels between VCC = 2.7 V and VCC = 3.6 V
•Typical VOLP (output ground bounce) < 0.8 V at VCC = 3.3 V, Tamb = 25°C
•Typical VOHV (output VOH undershoot) > 2 V at VCC = 3.3 V, Tamb = 25°C
•Non-inverting outputs
•Separate enable for each output
•Common select inputs
•Permits multiplexing from n lines to 1 line
•Enable line provided for cascading (n lines to 1 line)
•Output capability: standard
•ICC category: MSI
DESCRIPTION
The 74LV153 is a low-voltage CMOS device that is pin and function compatible with 74HC/HCT153.
The 74LV153 is a dual 4-input multiplexer which selects 2 bits of data from up to four sources selected by common data select inputs (S0, S1). The two 4-input multiplexer circuits have individual active
LOW output enable inputs (1E, 2E) which can be used to strobe the outputs independently. The outputs (1Y, 2Y) are forced LOW when the corresponding output enable inputs are HIGH. The 74LV153 is the logic implementation of a 2-pole, 4-position switch, where the position of the switch, is determined by the logic levels applied to S0 and S1. The logic equations for the outputs are:
1Y=1E.(1l0.S1.S0+1l1.S1.S0+1l2.S1.S0+1l3.S1.S0)
2Y=2E.(2l0.S1.S0+2l1.S1.S0+2l2.S1.S0+2l3.S1.S0)
The 74LV153 can be used to move data to a common output bus from a group of registers. The state of the select inputs would determine the particular register from which the data came. An alternative application is a function generator. The device can generate two functions or three variables. This is useful for implementing highly irregular random logic.
QUICK REFERENCE DATA
GND = 0 V; Tamb = 25°C; tr = tf ≤ 2.5 ns
SYMBOL |
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PARAMETER |
CONDITIONS |
TYPICAL |
UNIT |
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Propagation delay |
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14 |
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tPHL/tPLH |
1ln, 2ln to nY |
CL = 15 pF; |
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Sn to nY |
VCC = 3.3 V |
14 |
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to nY |
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10 |
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nE |
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CI |
Input capacitance |
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3.5 |
pF |
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CPD |
Power dissipation capacitance per gate |
VI = GND to VCC1 |
30 |
pF |
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NOTE:
1.CPD is used to determine the dynamic power dissipation (PD in mW) PD = CPD × VCC2 × fi (CL × VCC2 × fo) where:
fi = input frequency in MHz; CL = output load capacitance in pF;
fo = output frequency in MHz; VCC = supply voltage in V;(CL × VCC2 × fo) = sum of the outputs.
ORDERING INFORMATION
PACKAGES |
TEMPERATURE RANGE |
OUTSIDE NORTH AMERICA |
NORTH AMERICA |
PKG. DWG. # |
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16-Pin Plastic DIL |
±40°C to +125°C |
74LV153 N |
74LV153 N |
SOT38-4 |
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16-Pin Plastic SO |
±40°C to +125°C |
74LV153 D |
74LV153 D |
SOT109-1 |
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16-Pin Plastic SSOP Type II |
±40°C to +125°C |
74LV153 DB |
74LV153 DB |
SOT338-1 |
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16-Pin Plastic TSSOP Type I |
±40°C to +125°C |
74LV153 PW |
74LV153PW DH |
SOT403-1 |
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1998 Apr 28 |
2 |
853±1921 19309 |
Philips Semiconductors |
Product specification |
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Dual 4-input multiplexer |
74LV153 |
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PIN CONFIGURATION
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1E |
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1 |
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16 |
VCC |
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S1 |
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2 |
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15 |
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2E |
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1I3 |
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3 |
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14 |
S0 |
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1I2 |
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4 |
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13 |
2I3 |
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1I1 |
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5 |
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12 |
2I2 |
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1I0 |
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6 |
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11 |
2I1 |
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1Y |
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7 |
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10 |
2I0 |
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GND |
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8 |
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9 |
2Y |
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SV00538 |
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PIN DESCRIPTION
PIN |
SYMBOL |
FUNCTION |
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NUMBER |
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1, 15 |
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Output enable inputs (active LOW) |
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1E, |
2E |
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14, 2 |
S0, S1 |
Common data select inputs |
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6, 5, 4, 3 |
1l0 to 1l3 |
Data inputs from source 1 |
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7 |
1Y |
Multiplexer output from source 1 |
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8 |
GND |
Ground (0 V) |
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9 |
2Y |
Multiplexer output from source 2 |
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10, 11, 12, 13 |
2l0 to 2l3 |
Data inputs from source 2 |
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16 |
VCC |
Positive supply voltage |
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LOGIC SYMBOL
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6 |
5 |
4 |
3 |
10 |
11 |
12 |
13 |
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1l0 |
1l1 |
1l2 |
130 |
2l0 |
2l1 |
2l2 |
2l3 |
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14 |
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S0 |
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2 |
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S1 |
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1 |
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1E |
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15 |
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2E |
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1Y |
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2Y |
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LOGIC SYMBOL (IEEE/IEC)
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14 |
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0 |
0 |
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2 |
G |
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3 |
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1 |
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1 |
MUX |
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EN4 |
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6 |
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0 |
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5 |
7 |
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1 |
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4 |
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4 |
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2 |
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3 |
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3 |
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15 |
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10 |
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11 |
9 |
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12 |
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13 |
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SV00539 |
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FUNCTIONAL DIAGRAM |
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1 |
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6 |
1I 0 |
1E |
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5 |
1I 1 |
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MUX |
1Y |
7 |
4 |
1I |
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2 |
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3 |
1I 3 |
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14 |
S 0 |
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2 |
S 1 |
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10 |
2I 0 |
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11 |
2I 1 |
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12 |
2I |
MUX |
2Y |
9 |
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2 |
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13 |
2I 3 |
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2E |
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15 |
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SV00540 |
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7 |
9 |
SV00537
1998 Apr 28 |
3 |
Philips Semiconductors |
Product specification |
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Dual 4-input multiplexer |
74LV153 |
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LOGIC DIAGRAM
1E |
1I 3 |
1I 2 |
1I 1 |
1I 0 |
S 0 |
S 1 |
2I 3 |
2I 2 |
2I 1 |
2I 0 |
2E |
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1Y |
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2Y |
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SV00541 |
FUNCTION TABLE
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SELECT INPUTS |
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DATA INPUTS |
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OUTPUT ENABLE |
OUTPUT |
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S0 |
S1 |
nl0 |
nl1 |
nl2 |
nl3 |
nE |
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nY |
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X |
X |
X |
X |
X |
X |
H |
L |
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L |
L |
L |
X |
X |
X |
L |
L |
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L |
L |
H |
X |
X |
X |
L |
H |
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H |
L |
X |
L |
X |
X |
L |
L |
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H |
L |
X |
H |
X |
X |
L |
H |
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L |
H |
X |
X |
L |
X |
L |
L |
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L |
H |
X |
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H |
X |
L |
H |
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H |
H |
X |
X |
X |
L |
L |
L |
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H |
H |
X |
X |
X |
H |
L |
H |
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NOTES: |
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H |
= |
HIGH voltage level |
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L |
= |
LOW voltage level |
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X |
= |
don't care |
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1998 Apr 28 |
4 |
Philips Semiconductors |
Product specification |
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Dual 4-input multiplexer |
74LV153 |
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RECOMMENDED OPERATING CONDITIONS
SYMBOL |
PARAMETER |
CONDITIONS |
MIN |
TYP |
MAX |
UNIT |
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VCC |
DC supply voltage |
See Note 1 |
1.0 |
3.3 |
3.6 |
V |
VI |
Input voltage |
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0 |
± |
VCC |
V |
VO |
Output voltage |
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0 |
± |
VCC |
V |
Tamb |
Operating ambient temperature range in free air |
See DC and AC |
±40 |
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+85 |
°C |
characteristics |
±40 |
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+125 |
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VCC = 1.0V to 2.0V |
± |
± |
500 |
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tr, tf |
Input rise and fall times |
VCC = 2.0V to 2.7V |
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200 |
ns/V |
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VCC = 2.7V to 3.6V |
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100 |
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NOTE:
1. The LV is guaranteed to function down to VCC = 1.0V (input levels GND or VCC); DC characteristics are guaranteed from VCC = 1.2V to VCC = 3.6V.
ABSOLUTE MAXIMUM RATINGS1, 2
In accordance with the Absolute Maximum Rating System (IEC 134).
Voltages are referenced to GND (ground = 0 V).
SYMBOL |
PARAMETER |
CONDITIONS |
RATING |
UNIT |
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VCC |
DC supply voltage |
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±0.5 to +4.6 |
V |
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"IIK |
DC input diode current |
VI < ±0.5 or VI > VCC + 0.5V |
20 |
mA |
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"IOK |
DC output diode current |
VO < ±0.5 or VO > VCC + 0.5V |
50 |
mA |
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"IO |
DC output source or sink current |
±0.5V < VO < VCC + 0.5V |
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mA |
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± standard outputs |
25 |
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"IGND, |
DC VCC or GND current for types with |
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± standard outputs |
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50 |
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"ICC |
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Tstg |
Storage temperature range |
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±65 to +150 |
°C |
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Power dissipation per package |
for temperature range: ±40 to +125°C |
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PTOT |
± plastic DIL |
above +70°C derate linearly with 12 mW/K |
750 |
mW |
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± plastic mini-pack (SO) |
above +70°C derate linearly with 8 mW/K |
500 |
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± plastic shrink mini-pack (SSOP and TSSOP) |
above +60°C derate linearly with 5.5 mW/K |
400 |
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NOTES:
1.Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under ªrecommended operating conditionsº is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
2.The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
1998 Apr 28 |
5 |
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