INTEGRATED CIRCUITS
74LV132
Quad 2-input NAND Schmitt-trigger
Product specification |
1998 Apr 28 |
Supersedes data of 1997 Feb 04
IC24 Data Handbook
m n r
Philips Semiconductors |
Product specification |
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Quad 2-input NAND Schmitt-trigger |
74LV132 |
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FEATURES
•Wide operating voltage: 1.0 to 5.5V
•Optimized for Low Voltage applications: 1.0 to 3.6V
•Accepts TTL input levels between VCC = 2.7V and VCC = 3.6V
•Typical VOLP (output ground bounce) 0.8V @ VCC = 3.3V, Tamb = 25°C
•Typical VOHV (output VOH undershoot) 2V @ VCC = 3.3V, Tamb = 25°C
•Output capability: standard
•ICC category: SSI
QUICK REFERENCE DATA
GND = 0V; Tamb = 25°C; tr = tf 2.5 ns
APPLICATIONS
•Wave and pulse shapers
•Astable multivibrators
•Monostable multivibrators
DESCRIPTION
The 74LV132 is a low-voltage Si-gate CMOS device and is pin and function compatible with 74HC/HCT132.
The 74LV132 contains four 2-input NAND gates which accept standard input signals. They are capable of transforming slowly changing input signals into sharply defined, jitter-free output signals.
The gate switches at different points for positive and negative-going signals. The difference between the positive voltage VT+ and the negative voltage VT± is defined as the hysteresis voltage VH.
SYMBOL |
PARAMETER |
CONDITIONS |
TYPICAL |
UNIT |
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tPHL/tPLH |
Propagation delay |
CL = 15pF |
10 |
ns |
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nA, nB to nY |
VCC = 3.3V |
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CI |
Input capacitance |
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3.5 |
pF |
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CPD |
Power dissipation capacitance per gate |
Notes 1 and 2 |
24 |
pF |
NOTES:
1.CPD is used to determine the dynamic power dissipation (PD in μW) PD = CPD VCC2 fi (CL VCC2 fo) where:
fi = input frequency in MHz; CL = output load capacitance in pF;
fo = output frequency in MHz; VCC = supply voltage in V;(CL VCC2 fo) = sum of the outputs.
2.The condition is VI = GND to VCC
ORDERING INFORMATION
PACKAGES |
TEMPERATURE RANGE |
OUTSIDE NORTH AMERICA |
NORTH AMERICA |
PKG. DWG. # |
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14-Pin Plastic DIL |
±40°C to +125°C |
74LV132 N |
74LV132 N |
SOT27-1 |
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14-Pin Plastic SO |
±40°C to +125°C |
74LV132 D |
74LV132 D |
SOT108-1 |
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14-Pin Plastic SSOP Type II |
±40°C to +125°C |
74LV132 DB |
74LV132 DB |
SOT337-1 |
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14-Pin Plastic TSSOP Type I |
±40°C to +125°C |
74LV132 PW |
74LV132PW DH |
SOT402-1 |
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PIN DESCRIPTION
PIN |
SYMBOL |
FUNCTION |
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NUMBER |
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1, 4, 9, 12 |
1A to 4A |
Data inputs |
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2, 5, 10, 13 |
1B to 4B |
Data inputs |
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3, 6, 8, 11 |
1Y to 4Y |
Data outputs |
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7 |
GND |
Ground (0V) |
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14 |
VCC |
Positive supply voltage |
FUNCTION TABLE
INPUTS |
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OUTPUT |
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nA |
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nB |
nY |
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L |
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L |
H |
L |
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H |
H |
H |
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L |
H |
H |
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H |
L |
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NOTES:
H = HIGH voltage level
L = LOW voltage level
1998 Apr 28 |
2 |
853±1912 19290 |
Philips Semiconductors |
Product specification |
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Quad 2-input NAND Schmitt-trigger |
74LV132 |
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PIN CONFIGURATION |
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LOGIC SYMBOL |
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1 |
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1A |
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1A |
1 |
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14 |
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VCC |
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1Y |
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3 |
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1B |
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1B |
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2 |
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13 |
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4B |
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2 |
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1Y |
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3 |
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12 |
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4A |
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2A |
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4 |
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2A |
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4 |
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11 |
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4Y |
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2Y |
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6 |
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2B |
5 |
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10 |
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3B |
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5 |
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2B |
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2Y |
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6 |
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9 |
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3A |
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GND |
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9 |
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3A |
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7 |
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8 |
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3Y |
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3Y |
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8 |
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SV00213 |
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10 |
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3B |
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4A |
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LOGIC SYMBOL (IEEE/IEC) |
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12 |
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4Y |
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11 |
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13 |
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4B |
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1 |
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3 |
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SV00215 |
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2 |
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4 |
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5 |
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& |
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6 |
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LOGIC DIAGRAM |
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9 |
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10 |
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& |
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8 |
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A |
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Y |
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B |
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12 |
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13 |
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11 |
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SV00217 |
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SV00216 |
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RECOMMENDED OPERATING CONDITIONS |
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SYMBOL |
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PARAMETER |
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CONDITIONS |
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MIN |
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TYP |
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MAX |
UNIT |
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VCC |
DC supply voltage |
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See Note1 |
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1.0 |
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3.3 |
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5.5 |
V |
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VI |
Input voltage |
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0 |
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VCC |
V |
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VO |
Output voltage |
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0 |
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± |
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VCC |
V |
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Tamb |
Operating ambient temperature range in free |
See DC and AC |
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±40 |
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+85 |
°C |
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air |
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characteristics |
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±40 |
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+125 |
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Input rise and fall times except for |
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VCC = 1.0V to 2.0V |
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± |
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± |
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500 |
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tr, tf |
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VCC = 2.0V to 2.7V |
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± |
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± |
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200 |
ns/V |
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Schmitt-trigger inputs |
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VCC = 2.7V to 3.6V |
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± |
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± |
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100 |
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VCC = 3.6V to 5.5V |
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± |
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50 |
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NOTE:
1. The LV is guaranteed to function down to VCC = 1.0V (input levels GND or VCC); DC characteristics are guaranteed from VCC = 1.2V to VCC = 5.5V.
1998 Apr 28 |
3 |
Philips Semiconductors |
Product specification |
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Quad 2-input NAND Schmitt-trigger |
74LV132 |
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ABSOLUTE MAXIMUM RATINGS1, 2
In accordance with the Absolute Maximum Rating System (IEC 134).
Voltages are referenced to GND (ground = 0V).
SYMBOL |
PARAMETER |
CONDITIONS |
RATING |
UNIT |
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VCC |
DC supply voltage |
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±0.5 to +7.0 |
V |
±IIK |
DC input diode current |
VI < ±0.5 or VI > VCC + 0.5V |
20 |
mA |
±IOK |
DC output diode current |
VO < ±0.5 or VO > VCC + 0.5V |
50 |
mA |
±IO |
DC output source or sink current |
±0.5V < VO < VCC + 0.5V |
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mA |
± standard outputs |
25 |
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±IGND, |
DC VCC or GND current for types with |
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mA |
± standard outputs |
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50 |
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±ICC |
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Tstg |
Storage temperature range |
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±65 to +150 |
°C |
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Power dissipation per package |
for temperature range: ±40 to +125°C |
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PTOT |
± plastic DIL |
above +70°C derate linearly with 12 mW/K |
750 |
mW |
± plastic mini-pack (SO) |
above +70°C derate linearly with 8 mW/K |
500 |
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± plastic shrink mini-pack (SSOP and TSSOP) |
above +60°C derate linearly with 5.5 mW/K |
400 |
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NOTES:
1.Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under ªrecommended operating conditionsº is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
2.The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
DC CHARACTERISTICS
Over recommended operating conditions. Voltages are referenced to GND (ground = 0V).
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LIMITS |
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SYMBOL |
PARAMETER |
TEST CONDITIONS |
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-40°C to +85°C |
-40°C to +125°C |
UNIT |
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MIN |
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TYP1 |
MAX |
MIN |
MAX |
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VCC = 1.2V |
0.9 |
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0.9 |
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VIH |
HIGH level Input |
VCC = 2.0V |
1.4 |
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1.4 |
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V |
voltage |
VCC = 2.7 to 3.6V |
2.0 |
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2.0 |
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VCC = 4.5 to 5.5V |
0.7*VCC |
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0.7*VCC |
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VCC = 1.2V |
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0.3 |
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0.3 |
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VIL |
LOW level Input |
VCC = 2.0V |
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0.6 |
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0.6 |
V |
voltage |
VCC = 2.7 to 3.6V |
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0.8 |
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0.8 |
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VCC = 4.5 to 5.5 |
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0.3*VCC |
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0.3*VCC |
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VCC = 1.2V; VI = VIH or VIL; ±IO = 100μA |
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1.2 |
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HIGH level output |
VCC = 2.0V; VI = VIH or VIL; ±IO = 100μA |
1.8 |
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2.0 |
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1.8 |
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VOH |
VCC = 2.7V; VI = VIH or VIL; ±IO = 100μA |
2.5 |
|
2.7 |
|
2.5 |
|
V |
|
voltage; all outputs |
|
|
|
||||||
|
|
VCC = 3.0V; VI = VIH or VIL; ±IO = 100μA |
2.8 |
|
3.0 |
|
2.8 |
|
|
|
|
VCC = 4.5V; VI = VIH or VIL; ±IO = 100μA |
4.3 |
|
4.5 |
|
4.3 |
|
|
|
HIGH level output |
VCC = 3.0V; VI = VIH or VIL; ±IO = 6mA |
2.40 |
|
2.82 |
|
2.20 |
|
|
|
voltage; |
|
|
|
|
||||
VOH |
|
|
|
|
|
|
|
V |
|
STANDARD |
VCC = 4.5V; VI = VIH or VIL; ±IO = 12mA |
3.60 |
|
4.20 |
|
3.50 |
|
||
|
outputs |
|
|
|
|
||||
|
|
|
|
|
|
|
|
|
|
|
|
VCC = 1.2V; VI = VIH or VIL; IO = 100μA |
|
|
0 |
|
|
|
|
|
LOW level output |
VCC = 2.0V; VI = VIH or VIL; IO = 100μA |
|
|
0 |
0.2 |
|
0.2 |
|
VOL |
VCC = 2.7V; VI = VIH or VIL; IO = 100μA |
|
|
0 |
0.2 |
|
0.2 |
V |
|
voltage; all outputs |
|
|
|
||||||
|
|
VCC = 3.0V; VI = VIH or VIL; IO = 100μA |
|
|
0 |
0.2 |
|
0.2 |
|
|
|
VCC = 4.5V; VI = VIH or VIL; IO = 100μA |
|
|
0 |
0.2 |
|
0.2 |
|
1998 Apr 28 |
4 |