Philips 74LV132PW, 74LV132N, 74LV132DB, 74LV132D Datasheet

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Philips 74LV132PW, 74LV132N, 74LV132DB, 74LV132D Datasheet

INTEGRATED CIRCUITS

74LV132

Quad 2-input NAND Schmitt-trigger

Product specification

1998 Apr 28

Supersedes data of 1997 Feb 04

IC24 Data Handbook

m n r

Philips Semiconductors

Product specification

 

 

 

 

 

Quad 2-input NAND Schmitt-trigger

74LV132

 

 

 

 

 

 

FEATURES

Wide operating voltage: 1.0 to 5.5V

Optimized for Low Voltage applications: 1.0 to 3.6V

Accepts TTL input levels between VCC = 2.7V and VCC = 3.6V

Typical VOLP (output ground bounce) 0.8V @ VCC = 3.3V, Tamb = 25°C

Typical VOHV (output VOH undershoot) 2V @ VCC = 3.3V, Tamb = 25°C

Output capability: standard

ICC category: SSI

QUICK REFERENCE DATA

GND = 0V; Tamb = 25°C; tr = tf 2.5 ns

APPLICATIONS

Wave and pulse shapers

Astable multivibrators

Monostable multivibrators

DESCRIPTION

The 74LV132 is a low-voltage Si-gate CMOS device and is pin and function compatible with 74HC/HCT132.

The 74LV132 contains four 2-input NAND gates which accept standard input signals. They are capable of transforming slowly changing input signals into sharply defined, jitter-free output signals.

The gate switches at different points for positive and negative-going signals. The difference between the positive voltage VT+ and the negative voltage Vis defined as the hysteresis voltage VH.

SYMBOL

PARAMETER

CONDITIONS

TYPICAL

UNIT

 

 

 

 

 

tPHL/tPLH

Propagation delay

CL = 15pF

10

ns

nA, nB to nY

VCC = 3.3V

 

 

 

CI

Input capacitance

 

3.5

pF

CPD

Power dissipation capacitance per gate

Notes 1 and 2

24

pF

NOTES:

1.CPD is used to determine the dynamic power dissipation (PD in μW) PD = CPD VCC2 fi (CL VCC2 fo) where:

fi = input frequency in MHz; CL = output load capacitance in pF;

fo = output frequency in MHz; VCC = supply voltage in V;(CL VCC2 fo) = sum of the outputs.

2.The condition is VI = GND to VCC

ORDERING INFORMATION

PACKAGES

TEMPERATURE RANGE

OUTSIDE NORTH AMERICA

NORTH AMERICA

PKG. DWG. #

 

 

 

 

 

14-Pin Plastic DIL

±40°C to +125°C

74LV132 N

74LV132 N

SOT27-1

 

 

 

 

 

14-Pin Plastic SO

±40°C to +125°C

74LV132 D

74LV132 D

SOT108-1

 

 

 

 

 

14-Pin Plastic SSOP Type II

±40°C to +125°C

74LV132 DB

74LV132 DB

SOT337-1

 

 

 

 

 

14-Pin Plastic TSSOP Type I

±40°C to +125°C

74LV132 PW

74LV132PW DH

SOT402-1

 

 

 

 

 

PIN DESCRIPTION

PIN

SYMBOL

FUNCTION

NUMBER

 

 

 

 

 

1, 4, 9, 12

1A to 4A

Data inputs

 

 

 

2, 5, 10, 13

1B to 4B

Data inputs

 

 

 

3, 6, 8, 11

1Y to 4Y

Data outputs

 

 

 

7

GND

Ground (0V)

 

 

 

14

VCC

Positive supply voltage

FUNCTION TABLE

INPUTS

 

OUTPUT

 

 

 

 

nA

 

nB

nY

 

 

 

 

L

 

L

H

L

 

H

H

H

 

L

H

H

 

H

L

 

 

 

 

NOTES:

H = HIGH voltage level

L = LOW voltage level

1998 Apr 28

2

853±1912 19290

Philips Semiconductors

Product specification

 

 

 

Quad 2-input NAND Schmitt-trigger

74LV132

 

 

 

PIN CONFIGURATION

 

 

 

 

 

 

 

LOGIC SYMBOL

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

1

 

1A

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

1A

1

 

 

 

 

 

14

 

VCC

 

 

 

 

 

 

 

 

 

 

 

1Y

 

 

3

 

 

 

1B

 

 

 

 

 

 

 

 

 

 

 

 

 

 

1B

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

2

 

 

 

 

 

13

 

4B

 

 

2

 

 

 

 

 

 

 

 

 

 

 

 

 

 

1Y

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

3

 

 

 

 

 

12

 

4A

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

2A

 

 

 

 

 

 

 

 

 

 

4

 

2A

 

 

 

 

 

 

 

 

 

 

 

 

 

 

4

 

 

 

 

 

11

 

4Y

 

 

 

 

 

 

 

 

 

2Y

 

 

6

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

2B

5

 

 

 

 

 

10

 

3B

 

 

5

 

2B

 

 

 

 

 

 

 

 

 

 

 

 

 

 

2Y

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

6

 

 

 

 

 

9

 

3A

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

GND

 

 

 

 

 

 

 

 

 

 

9

 

3A

 

 

 

 

 

 

 

 

 

 

 

 

 

7

 

 

 

 

 

8

 

3Y

 

 

 

 

 

 

 

 

 

3Y

 

8

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

SV00213

 

 

 

10

 

3B

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

4A

 

 

 

 

 

 

 

 

 

 

 

 

LOGIC SYMBOL (IEEE/IEC)

 

 

 

 

 

 

12

 

 

 

 

 

4Y

 

11

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

13

 

4B

 

 

 

 

 

 

 

1

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

&

 

3

 

 

 

 

 

 

 

 

 

 

 

 

SV00215

 

 

2

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

4

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

5

 

 

&

 

6

 

 

 

LOGIC DIAGRAM

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

9

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

10

 

 

&

 

8

 

 

 

 

A

 

 

 

 

 

 

 

 

 

 

 

 

 

Y

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

B

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

12

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

13

 

 

&

 

11

 

 

 

 

 

 

 

 

 

 

 

 

SV00217

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

SV00216

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

RECOMMENDED OPERATING CONDITIONS

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

SYMBOL

 

 

 

 

PARAMETER

 

CONDITIONS

 

MIN

 

TYP

 

 

 

MAX

UNIT

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VCC

DC supply voltage

 

 

 

 

 

 

See Note1

 

1.0

 

3.3

 

 

 

5.5

V

VI

Input voltage

 

 

 

 

 

 

 

 

 

0

 

±

 

 

 

VCC

V

VO

Output voltage

 

 

 

 

 

 

 

 

 

0

 

±

 

 

 

VCC

V

Tamb

Operating ambient temperature range in free

See DC and AC

 

±40

 

 

 

 

 

 

 

+85

°C

air

 

 

 

 

 

 

 

 

 

characteristics

 

±40

 

 

 

 

 

 

 

+125

 

Input rise and fall times except for

 

VCC = 1.0V to 2.0V

 

±

 

±

 

 

 

500

 

tr, tf

 

VCC = 2.0V to 2.7V

 

±

 

±

 

 

 

200

ns/V

Schmitt-trigger inputs

 

 

 

 

 

 

VCC = 2.7V to 3.6V

 

±

 

±

 

 

 

100

 

 

 

 

 

 

 

 

 

 

 

 

VCC = 3.6V to 5.5V

 

±

 

±

 

 

 

50

 

NOTE:

1. The LV is guaranteed to function down to VCC = 1.0V (input levels GND or VCC); DC characteristics are guaranteed from VCC = 1.2V to VCC = 5.5V.

1998 Apr 28

3

Philips Semiconductors

Product specification

 

 

 

Quad 2-input NAND Schmitt-trigger

74LV132

 

 

 

ABSOLUTE MAXIMUM RATINGS1, 2

In accordance with the Absolute Maximum Rating System (IEC 134).

Voltages are referenced to GND (ground = 0V).

SYMBOL

PARAMETER

CONDITIONS

RATING

UNIT

 

 

 

 

 

VCC

DC supply voltage

 

±0.5 to +7.0

V

±IIK

DC input diode current

VI < ±0.5 or VI > VCC + 0.5V

20

mA

±IOK

DC output diode current

VO < ±0.5 or VO > VCC + 0.5V

50

mA

±IO

DC output source or sink current

±0.5V < VO < VCC + 0.5V

 

mA

± standard outputs

25

 

 

 

 

 

±IGND,

DC VCC or GND current for types with

 

 

mA

± standard outputs

 

50

±ICC

 

 

 

 

Tstg

Storage temperature range

 

±65 to +150

°C

 

Power dissipation per package

for temperature range: ±40 to +125°C

 

 

PTOT

± plastic DIL

above +70°C derate linearly with 12 mW/K

750

mW

± plastic mini-pack (SO)

above +70°C derate linearly with 8 mW/K

500

 

± plastic shrink mini-pack (SSOP and TSSOP)

above +60°C derate linearly with 5.5 mW/K

400

 

 

 

 

 

 

NOTES:

1.Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under ªrecommended operating conditionsº is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

2.The input and output voltage ratings may be exceeded if the input and output current ratings are observed.

DC CHARACTERISTICS

Over recommended operating conditions. Voltages are referenced to GND (ground = 0V).

 

 

 

 

 

 

LIMITS

 

 

 

 

 

 

 

 

 

 

 

 

 

SYMBOL

PARAMETER

TEST CONDITIONS

 

-40°C to +85°C

-40°C to +125°C

UNIT

 

 

 

 

 

 

 

 

 

 

 

 

 

MIN

 

TYP1

MAX

MIN

MAX

 

 

 

VCC = 1.2V

0.9

 

 

 

0.9

 

 

VIH

HIGH level Input

VCC = 2.0V

1.4

 

 

 

1.4

 

V

voltage

VCC = 2.7 to 3.6V

2.0

 

 

 

2.0

 

 

 

 

 

 

 

 

 

 

VCC = 4.5 to 5.5V

0.7*VCC

 

 

0.7*VCC

 

 

 

 

VCC = 1.2V

 

 

 

0.3

 

0.3

 

VIL

LOW level Input

VCC = 2.0V

 

 

 

0.6

 

0.6

V

voltage

VCC = 2.7 to 3.6V

 

 

 

0.8

 

0.8

 

 

 

 

 

 

 

 

 

VCC = 4.5 to 5.5

 

 

 

0.3*VCC

 

0.3*VCC

 

 

 

VCC = 1.2V; VI = VIH or VIL; ±IO = 100μA

 

 

1.2

 

 

 

 

 

HIGH level output

VCC = 2.0V; VI = VIH or VIL; ±IO = 100μA

1.8

 

2.0

 

1.8

 

 

VOH

VCC = 2.7V; VI = VIH or VIL; ±IO = 100μA

2.5

 

2.7

 

2.5

 

V

voltage; all outputs

 

 

 

 

 

VCC = 3.0V; VI = VIH or VIL; ±IO = 100μA

2.8

 

3.0

 

2.8

 

 

 

 

VCC = 4.5V; VI = VIH or VIL; ±IO = 100μA

4.3

 

4.5

 

4.3

 

 

 

HIGH level output

VCC = 3.0V; VI = VIH or VIL; ±IO = 6mA

2.40

 

2.82

 

2.20

 

 

 

voltage;

 

 

 

 

VOH

 

 

 

 

 

 

 

V

STANDARD

VCC = 4.5V; VI = VIH or VIL; ±IO = 12mA

3.60

 

4.20

 

3.50

 

 

outputs

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VCC = 1.2V; VI = VIH or VIL; IO = 100μA

 

 

0

 

 

 

 

 

LOW level output

VCC = 2.0V; VI = VIH or VIL; IO = 100μA

 

 

0

0.2

 

0.2

 

VOL

VCC = 2.7V; VI = VIH or VIL; IO = 100μA

 

 

0

0.2

 

0.2

V

voltage; all outputs

 

 

 

 

 

VCC = 3.0V; VI = VIH or VIL; IO = 100μA

 

 

0

0.2

 

0.2

 

 

 

VCC = 4.5V; VI = VIH or VIL; IO = 100μA

 

 

0

0.2

 

0.2

 

1998 Apr 28

4

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