Philips 74LV132PW, 74LV132N, 74LV132DB, 74LV132D Datasheet

74LV132
Quad 2-input NAND Schmitt-trigger
Product specification Supersedes data of 1997 Feb 04 IC24 Data Handbook
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1998 Apr 28
Philips Semiconductors Product specification
74L V132Quad 2-input NAND Schmitt-trigger
FEA TURES
Wide operating voltage: 1.0 to 5.5V
Optimized for Low Voltage applications: 1.0 to 3.6V
Accepts TTL input levels between V
Typical V
T
amb
Typical V
T
amb
(output ground bounce) 0.8V @ VCC = 3.3V,
OLP
= 25°C
(output VOH undershoot) 2V @ VCC = 3.3V,
OHV
= 25°C
= 2.7V and VCC = 3.6V
CC
Output capability: standard
I
category: SSI
CC
QUICK REFERENCE DATA
GND = 0V; T
SYMBOL
t
PHL/tPLH
C
I
C
PD
NOTES:
is used to determine the dynamic power dissipation (PD in µW)
1. C
PD
= CPD V
P
D
f
= input frequency in MHz; CL = output load capacitance in pF;
i
= output frequency in MHz; VCC = supply voltage in V;
f
o
(C
2. The condition is V
= 25°C; tr = tf 2.5 ns
amb
CC
2
V
L
fo) = sum of the outputs.
CC
PARAMETER CONDITIONS TYPICAL UNIT
Propagation delay nA, nB to nY
Input capacitance 3.5 pF Power dissipation capacitance per gate Notes 1 and 2 24 pF
2
fi (CL V
= GND to V
I
CC
2
fo) where:
CC
APPLICATIONS
Wave and pulse shapers
Astable multivibrators
Monostable multivibrators
DESCRIPTION
The 74LV132 is a low-voltage Si-gate CMOS device and is pin and function compatible with 74HC/HCT132.
The 74LV132 contains four 2-input NAND gates which accept standard input signals. They are capable of transforming slowly changing input signals into sharply defined, jitter-free output signals.
The gate switches at different points for positive and negative-going signals. The difference between the positive voltage V negative voltage V
CL = 15pF VCC = 3.3V
is defined as the hysteresis voltage VH.
T–
10 ns
and the
T+
ORDERING INFORMATION
PACKAGES TEMPERATURE RANGE OUTSIDE NORTH AMERICA NORTH AMERICA PKG. DWG. #
14-Pin Plastic DIL –40°C to +125°C 74LV132 N 74LV132 N SOT27-1 14-Pin Plastic SO –40°C to +125°C 74LV132 D 74LV132 D SOT108-1 14-Pin Plastic SSOP Type II –40°C to +125°C 74LV132 DB 74LV132 DB SOT337-1 14-Pin Plastic TSSOP Type I –40°C to +125°C 74L V132 PW 74LV132PW DH SOT402-1
PIN DESCRIPTION
PIN
NUMBER
1, 4, 9, 12 1A to 4A Data inputs 2, 5, 10, 13 1B to 4B Data inputs 3, 6, 8, 11 1Y to 4Y Data outputs 7 GND Ground (0V) 14 V
SYMBOL FUNCTION
CC
Positive supply voltage
FUNCTION TABLE
INPUTS OUTPUT
nA nB nY
L L H
L H H H L H H H L
NOTES:
H = HIGH voltage level L = LOW voltage level
1998 Apr 28 853–1912 19290
2
Philips Semiconductors Product specification
74LV132Quad 2-input NAND Schmitt-trigger
PIN CONFIGURATION
1
1A
2
1B 1Y
3
2A
4 5
2B
6
2Y
GND
7
LOGIC SYMBOL (IEEE/IEC)
1 2
4 5
9
10
12 13
&
&
&
&
SV00213
SV00216
14 13 12 11 10
9 8 3Y
3
6
8
11
LOGIC SYMBOL
1A
V
CC
4B 4A 4Y 3B 3A
1
1B
2
2A
4
2B
5
3A
9
3B
10
4A
12
4B
13
1Y
2Y
3Y
4Y
SV00215
3
6
8
11
LOGIC DIAGRAM
A
B
Y
SV00217
RECOMMENDED OPERA TING CONDITIONS
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNIT
V
CC
V
V
T
amb
tr, t
NOTE:
1. The LV is guaranteed to function down to V
DC supply voltage See Note1 1.0 3.3 5.5 V Input voltage 0 V
I
Output voltage 0 V
O
Operating ambient temperature range in free air
Input rise and fall times except for
f
Schmitt-trigger inputs
= 1.0V (input levels GND or VCC); DC characteristics are guaranteed from VCC = 1.2V to VCC = 5.5V.
CC
See DC and AC characteristics
VCC = 1.0V to 2.0V VCC = 2.0V to 2.7V VCC = 2.7V to 3.6V VCC = 3.6V to 5.5V
–40 –40
– – – –
– – – –
CC CC
+85
+125
500 200 100
50
V V
°C
ns/V
1998 Apr 28
3
Philips Semiconductors Product specification
V
V
V
V
voltage all out uts
V
g
V
voltage all out uts
74LV132Quad 2-input NAND Schmitt-trigger
ABSOLUTE MAXIMUM RATINGS
1, 2
In accordance with the Absolute Maximum Rating System (IEC 134). Voltages are referenced to GND (ground = 0V).
SYMBOL
V
CC
±I
IK
±I
OK
±I
O
±I
GND
±I
CC
T
stg
P
TOT
DC supply voltage –0.5 to +7.0 V DC input diode current VI < –0.5 or VI > VCC + 0.5V 20 mA DC output diode current VO < –0.5 or VO > VCC + 0.5V 50 mA DC output source or sink current
– standard outputs
DC VCC or GND current for types with
,
– standard outputs 50
Storage temperature range –65 to +150 °C Power dissipation per package
– plastic DIL – plastic mini-pack (SO) – plastic shrink mini-pack (SSOP and TSSOP)
PARAMETER CONDITIONS RATING UNIT
–0.5V < VO < VCC + 0.5V
25
mA
mA
for temperature range: –40 to +125°C above +70°C derate linearly with 12 mW/K above +70°C derate linearly with 8 mW/K above +60°C derate linearly with 5.5 mW/K
750 500 400
mW
NOTES:
1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability .
2. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
DC CHARACTERISTICS
Over recommended operating conditions. V oltages are referenced to GND (ground = 0V).
LIMITS
SYMBOL P ARAMETER TEST CONDITIONS
VCC = 1.2V 0.9 0.9
IH
HIGH level Input voltage
VCC = 2.0V 1.4 1.4 VCC = 2.7 to 3.6V 2.0 2.0 VCC = 4.5 to 5.5V 0.7*V VCC = 1.2V 0.3 0.3
IL
LOW level Input voltage
VCC = 2.0V 0.6 0.6 VCC = 2.7 to 3.6V 0.8 0.8 VCC = 4.5 to 5.5 0.3*V VCC = 1.2V; VI = VIH or V VCC = 2.0V; VI = VIH or V
OH
HIGH level output
;
V
VCC = 2.7V; VI = VIH or V
p
VCC = 3.0V; VI = VIH or V VCC = 4.5V; VI = VIH or V
OH
HIGH level output voltage; STANDARD outputs
VCC = 3.0V; VI = VIH or V
VCC = 4.5V; VI = VIH or V VCC = 1.2V; VI = VIH or V
VCC = 2.0V; VI = VIH or V
OL
LOW level output
;
V
VCC = 2.7V; VI = VIH or V
p
VCC = 3.0V; VI = VIH or V VCC = 4.5V; VI = VIH or V
–IO = 100µA 1.2
IL;
–IO = 100µA 1.8 2.0 1.8
IL;
–IO = 100µA 2.5 2.7 2.5
IL;
–IO = 100µA 2.8 3.0 2.8
IL;
–IO = 100µA 4.3 4.5 4.3
IL;
–IO = 6mA 2.40 2.82 2.20
IL;
–IO = 12mA 3.60 4.20 3.50
IL;
IO = 100µA 0
IL;
IO = 100µA 0 0.2 0.2
IL;
IO = 100µA 0 0.2 0.2
IL;
IO = 100µA 0 0.2 0.2
IL;
IO = 100µA 0 0.2 0.2
IL;
-40°C to +85°C -40°C to +125°C
MIN TYP
CC
1
MAX MIN MAX
0.7*V
CC
CC
0.3*V
CC
UNIT
V
V
1998 Apr 28
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