Philips 74LV126PW, 74LV126DB, 74LV126D Datasheet

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74LV126

Quad buffer/line driver (3-State)

Product specification

1998 Apr 28

Supersedes data of 1997 Feb 03

IC24 Data Handbook

m n r

Philips Semiconductors

Product specification

 

 

 

 

 

Quad buffer/line driver (3-State)

74LV126

 

 

 

 

 

 

FEATURES

Wide operating voltage: 1.0 to 5.5 V

Optimized for low voltage applications: 1.0 to 3.6 V

Accepts TTL input levels between VCC = 2.7 V and VCC = 3.6 V

Typical VOLP (output ground bounce) < 0.8 V at VCC = 3.3 V, Tamb = 25°C

Typical VOHV (output VOH undershoot) > 2 V at VCC = 3.3 V, Tamb = 25°C

Output capability: bus driver

ICC category: MSI

DESCRIPTION

The 74LV126 is a low-voltage Si-gate CMOS device that is pin and function compatible with 74HC/HCT126.

The 74LV126 consists of four non-inverting buffers/line drivers with 3-state outputs. The 3-state outputs (nY) are controlled by the output enable input (nOE). A LOW at nOE causes the outputs to assume a high impedance OFF-state.

QUICK REFERENCE DATA

GND = 0 V; Tamb = 25°C; tr = tf ≤ 2.5 ns

SYMBOL

PARAMETER

CONDITIONS

TYPICAL

UNIT

 

 

 

 

 

tPHL/tPLH

Propagation delay

CL = 15 pF;

9

ns

nA to nY

VCC = 3.3 V

 

 

 

CI

Input capacitance

 

3.5

pF

CPD

Power dissipation capacitance per buffer

VCC = 3.3 V;

23

pF

VI = GND to VCC1

NOTE:

1.CPD is used to determine the dynamic power dissipation (PD in mW) PD = CPD × VCC2 × fi (CL × VCC2 × fo) where:

fi = input frequency in MHz; CL = output load capacitance in pF;

fo = output frequency in MHz; VCC = supply voltage in V;(CL × VCC2 × fo) = sum of the outputs.

ORDERING INFORMATION

PACKAGES

TEMPERATURE RANGE

OUTSIDE NORTH AMERICA

NORTH AMERICA

PKG. DWG. #

 

 

 

 

 

14-Pin Plastic DIL

±40°C to +125°C

74LV126 N

74LV126 N

SOT27-1

 

 

 

 

 

14-Pin Plastic SO

±40°C to +125°C

74LV126 D

74LV126 D

SOT108-1

 

 

 

 

 

14-Pin Plastic SSOP Type II

±40°C to +125°C

74LV126 DB

74LV126 DB

SOT337-1

 

 

 

 

 

14-Pin Plastic TSSOP Type I

±40°C to +125°C

74LV126 PW

74LV126PW DH

SOT402-1

 

 

 

 

 

PIN DESCRIPTION

PIN

SYMBOL

FUNCTION

NUMBER

 

 

 

 

 

1, 4, 10, 13

1OE ± 4OE

Output enable inputs (active HIGH)

 

 

 

2, 5, 9, 12

1A ± 4A

Data inputs

 

 

 

3, 6, 8, 11

1Y ± 4Y

Data outputs

 

 

 

7

GND

Ground (0 V)

 

 

 

14

VCC

Positive supply voltage

FUNCTION TABLE

 

 

INPUTS

 

OUTPUTS

 

 

 

 

 

 

 

 

nOE

 

nA

nY

 

 

 

 

 

 

 

 

H

 

L

L

 

 

H

 

H

H

 

 

L

 

X

Z

 

 

 

 

NOTES:

 

 

H

=

HIGH voltage level

 

 

L

=

LOW voltage level

 

 

X

=

don't care

 

 

Z

=

high impedance OFF-state

 

1998 Apr 28

2

853±1902 19290

Philips 74LV126PW, 74LV126DB, 74LV126D Datasheet

Philips Semiconductors

Product specification

 

 

 

Quad buffer/line driver (3-State)

74LV126

 

 

 

PIN CONFIGURATION

LOGIC SYMBOL

1OE

1

14

 

VCC

 

1A

2

 

 

13

 

4OE

 

 

 

 

1Y

3

12

 

4A

2OE

4

11

 

4Y

2A

5

10

 

3OE

2Y

6

9

 

3A

GND

7

8

 

3Y

 

 

SV00483

 

 

 

 

 

2

1A

1Y

3

1

1OE

 

 

5

2A

2Y

6

4

2OE

 

 

9

3A

3Y

8

10

3OE

 

 

12

4A

4Y

11

13

4OE

 

 

 

 

SV00484

LOGIC SYMBOL (IEEE/IEC)

 

2

 

3

2

1

 

3

EN

 

1

 

1

5

EN1

 

5

6

 

6

4

 

EN

4

 

 

9

9

8

 

8

10

 

10

EN

12

12

11

11

13

13

 

EN

(a)

(b)

 

SV00485

LOGIC DIAGRAM (ONE GATE)

nA

nY

nOE

SV00486

RECOMMENDED OPERATING CONDITIONS

SYMBOL

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNIT

 

 

 

 

 

 

 

VCC

DC supply voltage

See Note 1

1.0

3.3

5.5

V

VI

Input voltage

 

0

±

VCC

V

VO

Output voltage

 

0

±

VCC

V

Tamb

Operating ambient temperature range in free air

See DC and AC

±40

 

+85

°C

characteristics

±40

 

+125

 

 

VCC = 1.0V to 2.0V

±

±

500

 

tr, tf

Input rise and fall times

VCC = 2.0V to 2.7V

±

±

200

ns/V

VCC = 2.7V to 3.6V

±

±

100

 

 

VCC = 3.6V to 5.5V

±

±

50

 

NOTE:

1. The LV is guaranteed to function down to VCC = 1.0V (input levels GND or VCC); DC characteristics are guaranteed from VCC = 1.2V to VCC = 5.5V.

1998 Apr 28

3

Philips Semiconductors

Product specification

 

 

 

Quad buffer/line driver (3-State)

74LV126

 

 

 

ABSOLUTE MAXIMUM RATINGS1, 2

In accordance with the Absolute Maximum Rating System (IEC 134).

Voltages are referenced to GND (ground = 0 V).

SYMBOL

PARAMETER

CONDITIONS

RATING

UNIT

 

 

 

 

 

VCC

DC supply voltage

 

±0.5 to +7.0

V

"IIK

DC input diode current

VI < ±0.5 or VI > VCC + 0.5V

20

mA

"IOK

DC output diode current

VO < ±0.5 or VO > VCC + 0.5V

50

mA

"IO

DC output source or sink current

±0.5V < VO < VCC + 0.5V

 

mA

± bus driver outputs

35

 

 

 

 

 

 

 

 

"IGND,

DC VCC or GND current for types with

 

 

mA

± bus driver outputs

 

70

"ICC

 

 

 

 

 

 

Tstg

Storage temperature range

 

±65 to +150

°C

 

Power dissipation per package

for temperature range: ±40 to +125°C

 

 

PTOT

± plastic DIL

above +70°C derate linearly with 12 mW/K

750

mW

± plastic mini-pack (SO)

above +70°C derate linearly with 8 mW/K

500

 

± plastic shrink mini-pack (SSOP and TSSOP)

above +60°C derate linearly with 5.5 mW/K

400

 

 

 

 

 

 

NOTES:

1.Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under ªrecommended operating conditionsº is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

2.The input and output voltage ratings may be exceeded if the input and output current ratings are observed.

DC ELECTRICAL CHARACTERISTICS

Over recommended operating conditions, voltages are referenced to GND (ground = 0 V)

 

 

 

 

 

 

LIMITS

 

 

 

 

 

 

 

 

 

 

 

 

 

SYMBOL

PARAMETER

TEST CONDITIONS

 

-40°C to +85°C

-40°C to +125°C

UNIT

 

 

 

 

 

 

 

 

 

 

 

 

 

MIN

 

TYP1

MAX

MIN

MAX

 

 

 

VCC = 1.2 V

0.9

 

 

 

0.9

 

 

VIH

HIGH level Input

VCC = 2.0 V

1.4

 

 

 

1.4

 

V

voltage

VCC = 2.7 to 3.6 V

2.0

 

 

 

2.0

 

 

 

 

 

 

 

 

 

 

VCC = 4.5 to 5.5 V

0.7<VCC

 

 

0.7<VCC

 

 

 

 

VCC = 1.2 V

 

 

 

0.3

 

0.3

 

VIL

LOW level Input

VCC = 2.0 V

 

 

 

0.6

 

0.6

V

voltage

VCC = 2.7 to 3.6 V

 

 

 

0.8

 

0.8

 

 

 

 

 

 

 

 

 

VCC = 4.5 to 5.5

 

 

 

0.3<VCC

 

0.3<VCC

 

 

 

VCC = 1.2 V; VI = VIH or VIL; ±IO = 100μA

 

 

1.2

 

 

 

 

 

HIGH level output

VCC = 2.0 V; VI = VIH or VIL; ±IO = 100μA

1.8

 

2.0

 

1.8

 

 

VOH

VCC = 2.7 V; VI = VIH or VIL; ±IO = 100μA

2.5

 

2.7

 

2.5

 

V

voltage; all outputs

 

 

 

 

 

VCC = 3.0 V; VI = VIH or VIL; ±IO = 100μA

2.8

 

3.0

 

2.8

 

 

 

 

VCC = 4.5 V; VI = VIH or VIL; ±IO = 100μA

4.3

 

4.5

 

4.3

 

 

 

HIGH level output

VCC = 3.0 V; VI = VIH or VIL; ±IO = 8mA

2.40

 

2.82

 

2.20

 

 

VOH

voltage; BUS driver

 

 

 

 

 

 

 

V

VCC = 4.5 V; VI = VIH or VIL; ±IO = 16mA

3.60

 

4.20

 

3.50

 

 

outputs

 

 

 

 

 

 

VCC = 1.2 V; VI = VIH or VIL; IO = 100μA

 

 

0

 

 

 

 

 

LOW level output

VCC = 2.0 V; VI = VIH or VIL; IO = 100μA

 

 

0

0.2

 

0.2

 

VOL

VCC = 2.7 V; VI = VIH or VIL; IO = 100μA

 

 

0

0.2

 

0.2

V

voltage; all outputs

 

 

 

 

 

VCC = 3.0 V; VI = VIH or VIL; IO = 100μA

 

 

0

0.2

 

0.2

 

 

 

VCC = 4.5 V; VI = VIH or VIL; IO = 100μA

 

 

0

0.2

 

0.2

 

1998 Apr 28

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