Philips 74HCT594N, 74HCT594D, 74HC594DB, 74HC594D Datasheet

INTEGRATED CIRCUITS

DATA SH EET

For a complete data sheet, please also download:

•The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications

•The IC06 74HC/HCT/HCU/HCMOS Logic Package Information

•The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines

74HC/HCT594

8-bit shift register with output
register

Product specification
File under Integrated Circuits, IC06

December 1991

Philips Semiconductors Product specification

8-bit shift register with output register 74HC/HCT594

FEATURES

• Synchronous serial input and output

• 8-bit parallel output

• Shift and storage register have independent direct clear

and clocks

• 100 MHz (typ.)

• Output capability:

– parallel outputs: bus driver
– serial outputs: standard

• ICCcategory: MSI

DESCRIPTION

The 74HC/HCT594 are high-speed, Si-gate CMOS
devices, and are pin compatible with low power Schottky
TTL (LSTTL). They are specified in compliance with
JEDEC standard No. 7A.
The 74HC/HCT594 contain an 8-bit, non-inverting,
serial-in, parallel-out shift register that feeds an 8-bit
D-type storage register. Separate clocks and direct
overriding clears are provided on both the shift and storage
registers. A serial output (Q7’) is provided for cascading
purposes.

Both the shift and storage register clocks are positive-edge
triggered. If the user wishes to connect both clocks

APPLICATIONS

• Serial-to parallel data conversion

together, the shift register will always be one count pulse
ahead of the storage register.

• Remote control holding register

QUICK REFERENCE DATA

GND = 0 V: T

= 250 C; tr = tf= 6 ns.

amb

SYMBOL PARAMETER CONDITIONS

t

PHL/tPLH

f

max

C

I

C

PD

propagation delay CL= 15 pF; VCC= 5 V

SH

to Q7’ 1315ns

CP

ST

to Q

CP

n

SHRto Q
STRto Q

maximum clock frequency SHCP,ST

n

n

CP

input capacitance 3.5 3.5 pF
power dissipation capacitance per package notes 1 and 2 84 89 pF

TYPICAL

UNIT

HC HCT

13 15 ns
11 14 ns
11 14 ns
100 100 MHz

Notes

1. C

is used to determine the dynamic power dissipation (PDin µW).

PD

PD= CPD× V

2

× fi+ ∑ (CL× V

CC

2

× fo), where:

CC

fi= input frequency in MHz; fo= output frequency in MHz;
∑ (CL× V

2

× fo) = sum of the outputs;

CC

CL= output load capacitance in pF; VCC= supply voltage in V.

2. For HC, the condition is VI= GND to VCC; for HCT, the condition is VI= GND to VCC− 1.5 V.

ORDERING INFORMATION

PACKAGES

EXTENDED TYPE NUMBER

PINS PIN POSITION MATERIAL CODE

PC74HC/HCT594P 16 DIL plastic SOT38C, P
PC74HC/HCT594T 16 SO plastic SOT109A

December 1991 2

Philips Semiconductors Product specification

8-bit shift register with output register 74HC/HCT594

PINNING

SYMBOL PIN DESCRIPTION

Q

to Q

0

7

GND 8 ground (0 V)
Q

’ 9 serial data output

7

SH

R

SH

CP

ST

CP

ST

R

D

s

V

CC

15 & 1 to 7 parallel data outputs

10 shift register reset (active LOW)
11 shift register clock input
12 storage register clock input
13 storage register reset active (LOW)
14 serial data input
16 supply voltage

e

SHCPST

14

D

SHRST

Fig.1 Logic symbol.

11 12

S

10 13

CP

Q7'
Q
Q

Q
Q
Q
Q
Q
Q

R

0
1

2
3
4
5
6
7

MBC319

halfpage

e

9

15

1
2
3
4
5
6
7

Q
Q

Q
Q
Q
Q
Q

GND

1

1

2

2

3

3

4

4
5
6
7

594

5
6
7
8

MBC318

V

16

CC

Q

15

0

14

D

S

13

ST

R

12

ST

CP

SH

11

CP

10

SH

R

9

Q7'

Fig.2 Pin configuration.

13

ST

R

12

ST

CP

10

SH

SH

CP

D

R

11

14

S

R

SRG8

1

C1/

1D 2D

Fig.3 IEC logic symbol.

R

2

C2

MBC322 - 1

15

Q

0

1

Q

1

2

Q

2

3

Q

3

4

Q

4

5

Q

5

6

Q

6

7

Q

7

9

Q7'

December 1991 3