Philips 74hc hct9014 DATASHEETS
INTEGRATED CIRCUITS
DATA SH EET
For a complete data sheet, please also download:
•The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications
•The IC06 74HC/HCT/HCU/HCMOS Logic Package Information
•The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines
74HC/HCT9014
Nine wide Schmitt trigger buffer/line
driver; inverting
Product specification
Supersedes data of March 1988
File under Integrated Circuits, IC06
December 1990
Philips Semiconductors Product specification
Nine wide Schmitt trigger buffer/line
driver; inverting
FEATURES
• Schmitt trigger action on all data inputs
• Output capability: standard
• ICCcategory: MSI
GENERAL DESCRIPTION
The 74HC/HCT9014 are high-speed Si-gate CMOS
devices and are pin compatible with low power Schottky
TTL (LSTTL). They are specified in compliance with
JEDEC standard no. 7A.
QUICK REFERENCE DATA
GND = 0 V; T
=25°C; tr=tf= 6 ns
amb
SYMBOL PARAMETER CONDITIONS
t
PHL
C
C
I
PD
/ t
PLH
propagation delay Anto Y
n
input capacitance 3.5 3.5 pF
power dissipation capacitance per buffer notes 1 and 2 30 32 pF
The 74HC/HCT9014 are nine wide Schmitt trigger
inverting buffer/line drivers with Schmitt trigger inputs.
These inputs transform slowly changing input signals into
sharply defined jitter-free output signals.
The “9014” is identical to the “9015” but has inverting
inputs.
CL= 15 pF; VCC= 5 V 12 13 ns
74HC/HCT9014
TYPICAL
UNIT
HC HCT
Notes
1. C
is used to determine the dynamic power dissipation (PDin µW):
PD
PD=CPD× V
2
× fi+∑(CL× V
CC
2
× fo) where:
CC
fi= input frequency in MHz
fo= output frequency in MHz
∑ (CL× V
2
× fo) = sum of outputs
CC
CL= output load capacitance in pF
VCC= supply voltage in V
2. For HC the condition is VI= GND to V
CC
For HCT the condition is VI= GND to VCC− 1.5 V
ORDERING INFORMATION
“74HC/HCT/HCU/HCMOS Logic Package Information”
See
.
December 1990 2
Philips Semiconductors Product specification
Nine wide Schmitt trigger buffer/line driver;
inverting
PIN DESCRIPTION
PIN NO. SYMBOL NAME AND FUNCTION
1, 2, 3, 4, 5, 6, 7, 8, 9 A
10 GND ground (0 V)
19, 18, 17, 16, 15, 14, 13, 12, 11
20 V
page
to A
0
Y0to Y
CC
8
8
data inputs
data outputs
positive supply voltage
A
0
1
A
1
2
A
2
3
A
3
4
Y
0
19
Y
1
18
Y
2
17
Y
3
16
age
74HC/HCT9014
1
2
3
4
19
18
17
16
A
4
5
A
5
6
A
6
7
A
7
8
A
8
9
MBA015
Y
4
Y
5
Y
6
Y
7
Y
8
Fig.1 Pin configuration. Fig.2 Logic symbol.
15
14
13
12
11
5
6
7
8
9
MBA014
15
14
13
12
11
Fig.3 IEC logic symbol.
December 1990 3
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