Philips 74hc hct7245 DATASHEETS

INTEGRATED CIRCUITS
DATA SH EET
The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications
The IC06 74HC/HCT/HCU/HCMOS Logic Package Information
The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines
74HC/HCT7245
Octal bus Schmitt-trigger transceiver; 3-state
Product specification File under Integrated Circuits, IC06
December 1990
Philips Semiconductors Product specification
Octal bus Schmitt-trigger transceiver; 3-state

FEATURES

Octal bidirectional bus interface
Non-inverting 3-state outputs
Output capability: bus driver
ICCcategory: MSI
Schmitt-trigger action on all data
inputs

GENERAL DESCRIPTION

The 74HC/HCT7245 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in

QUICK REFERENCE DATA

GND = 0 V; T
=25°C; tr=tf= 6 ns
amb
compliance with JEDEC standard no. 7A.
The 74HC/HCT7245 are octal transceivers featuring non-inverting 3-state bus compatible outputs in both send and receive directions. The “7245” features an output enable
OE) input for easy cascading and a
( send/receive input (DIR) for direction control. OE controls the outputs so that the buses are effectively isolated. The 74HC/HCT7245 have Schmitt-trigger inputs. These inputs are capable of transforming slowly changing input signals into sharply defined jitter-free output signals.
74HC/HCT7245
The “7245” is identical to the “245” but has hysteresis on the data inputs.

FUNCTION TABLE

INPUTS INPUTS/OUTPUTS
OE DIR A
L
L
L
H
H
X
n
A=B inputs Z
Notes
1. H = HIGH voltage level L = LOW voltage level X = don’t care Z = high impedance OFF-state
B
n
inputs B=A Z
SYMBOL PARAMETER CONDITIONS
t
PHL
C C C
I I/O PD
/ t
PLH
propagation delay Anto B
n
CL= 15 pF; VCC= 5 V 8 12 ns input capacitance 3.5 3.5 pF input/output capacitance 10 10 pF power dissipation capacitance per transceiver notes 1 and 2 40 40 pF
Notes
1. C
is used to determine the dynamic power dissipation (PDin µW):
PD
PD=CPD× V
2
× fi+∑(CV
CC
2
× fo) where:
CC
fi= input frequency in MHz fo= output frequency in MHz (CV
2
× fo) = sum of outputs
CC
CL= output load capacitance in pF VCC= supply voltage in V
2. For HC the condition is VI= GND to V
CC
For HCT the condition is VI= GND to VCC− 1.5 V

ORDERING INFORMATION

“74HC/HCT/HCU/HCMOS Logic Package Information”
See
.
TYPICAL
UNIT
HC HCT
December 1990 2
Philips Semiconductors Product specification
Octal bus Schmitt-trigger transceiver; 3-state

PIN DESCRIPTION

PIN NO. SYMBOL NAME AND FUNCTION
1 DIR direction control 2, 3, 4, 5, 6, 7, 8, 9 A 10 GND ground (0 V) 18, 17, 16, 15, 14, 13, 12, 11 B 19 20 V
lfpage
DIR
A A A A A A A A
GND
1 2
0
3
1
4
2
5
3 4 5 6 7
7245
6 7 8 9
10
MBA327
V
20
CC
19
OE
18
B
0
B
17
1
B
16
2
B
15
3
B
14
4
B
13
5
B
12
6
B
11
7
e
19
1
2
9
0
0
to A
to B
7
7
data inputs/outputs
data inputs/outputs
OE output enable input (active LOW)
positive supply voltage
ge
B
0
18
B
7
11
MBA330
A
A
CC
OE
DIR
0
7
74HC/HCT7245
19
G3 3EN1
1
3EN2
1
2 3
4 5 6 7 8 9
2
MBA404
18 17
16 15 14 13 12 11
Fig.1 Pin configuration.
Fig.2 Functional diagram.
December 1990 3
Fig.3 IEC logic symbol.
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