Philips 74hc hct7080 DATASHEETS
INTEGRATED CIRCUITS
DATA SH EET
For a complete data sheet, please also download:
•The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications
•The IC06 74HC/HCT/HCU/HCMOS Logic Package Information
•The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines
74HC/HCT7080
16-bit even/odd parity
generator/checker
Product specification
File under Integrated Circuits, IC06
December 1990
Philips Semiconductors Product specification
16-bit even/odd parity
generator/checker
FEATURES
• Word-length easily expanded by cascading
• Generates either even or odd parity for 16-data bits
• Output capability: standard
• ICC category: MSI
GENERAL DESCRIPTION
The 74HC/HCT7080 are high-speed Si-gate CMOS
devices. They are specified in compliance with JEDEC
standard no. 7A.
QUICK REFERENCE DATA
GND = 0 V; T
=25°C; tr=tf= 6 ns
amb
SYMBOL PARAMETER CONDITIONS
t
PHL/ tPLH
propagation delay CL= 15 pF; VCC=5 V
I
to E/O 2932ns
n
X to E/O 1215ns
C
I
C
PD
input capacitance 3.5 3.5 pF
power dissipation capacitance per package notes 1 and 2 24 25 pF
The 74HC/HCT7080 are 16-bit parity generators or
checkers commonly used to detect errors in high-speed
data transmission or data retrieval systems.
The even and odd parity output is available for generating
or checking even/odd parity up to 16-bits.
The even/odd parity output (E/
number of data inputs (I0to I15) are HIGH and the
cascade/even-odd-changing input (X) is HIGH.
Expansion to larger word sizes is accomplished by
connecting the even/odd parity output (E/O) to the
cascade/even-odd-changing input (X) of the final stage.
74HC/HCT7080
O) is HIGH when an even
TYPICAL
UNIT
HC HCT
Notes
1. C
is used to determine the dynamic power dissipation (PD in µW):
PD
PD=CPD× V
2
× fi+ ∑ (CL×V
CC
2
× fo) where:
CC
fi= input frequency in MHz
fo= output frequency in MHz
∑ (CL× V
2
× fo) = sum of outputs
CC
CL= output load capacitance in pF
VCC= supply voltage in V
2. For HC the condition is VI= GND to V
CC
For HCT the condition is VI= GND to VCC− 1.5 V
ORDERING INFORMATION
“74HC/HCT/HCU/HCMOS Logic Package Information”
See
.
December 1990 2
Philips Semiconductors Product specification
16-bit even/odd parity generator/checker 74HC/HCT7080
PIN DESCRIPTION
PIN NO. SYMBOL NAME AND FUNCTION
1
2, 3, 4, 5, 6, 7, 8, 9, 11, 12, 13, 14, 15, 16, 17, 18 I
10 GND ground (0 V)
19 E/
20 V
X cascade/even-odd-changing input
to I
0
15
data inputs
O even/odd parity output
CC
positive supply voltage
Fig.1 Pin configuration. Fig.2 Logic symbol. Fig.3 IEC logic symbol.
December 1990 3
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