Philips 74hc hct688 DATASHEETS

INTEGRATED CIRCUITS

DATA SH EET

For a complete data sheet, please also download:

•The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications

•The IC06 74HC/HCT/HCU/HCMOS Logic Package Information

•The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines

74HC/HCT688

8-bit magnitude comparator

Product specification
File under Integrated Circuits, IC06

December 1990

Philips Semiconductors Product specification

8-bit magnitude comparator 74HC/HCT688

FEATURES

• Compare two 8-bit words

• Output capability: standard

• ICCcategory: MSI

GENERAL DESCRIPTION

The 74HC/HCT688 are high-speed Si-gate CMOS devices
and are pin compatible with low power Schottky TTL
(LSTTL). They are specified in compliance with JEDEC
standard no. 7A.

The 74HC/HCT688 are 8-bit magnitude comparators.
They perform comparison of two 8-bit binary or BCD
words.
The output provides P = Q.

QUICK REFERENCE DATA

GND = 0 V; T

=25°C; tr=tf= 6 ns

amb

SYMBOL PARAMETER CONDITIONS

t

PHL/ tPLH

C

I

C

PD

propagation delay CL= 15 pF; VCC=5 V

, Qnto P = Q 1717ns

P

n

E to

P = Q 8 12 ns
input capacitance 3.5 3.5 pF
power dissipation capacitance per package notes 1 and 2 30 30 pF

Notes

1. C

is used to determine the dynamic power dissipation (PD in µW):

PD

PD=CPD× V

2

× fi+ ∑ (CL× V

CC

2

× fo) where:

CC

fi= input frequency in MHz
fo= output frequency in MHz
∑ (CL× V

2

× fo) = sum of outputs

CC

CL= output load capacitance in pF
VCC= supply voltage in V

2. For HC the condition is VI= GND to V

CC

For HCT the condition is VI= GND to VCC− 1.5 V

TYPICAL

UNIT

HC HCT

ORDERING INFORMATION

See

“74HC/HCT/HCU/HCMOS Logic Package Information”

December 1990 2

.

Philips Semiconductors Product specification

8-bit magnitude comparator 74HC/HCT688

PIN DESCRIPTION

PIN NO. SYMBOL NAME AND FUNCTION

1
2, 4, 6, 8, 11, 13, 15, 17 P
3, 5, 7, 9, 12, 14, 16, 18 Q
10 GND ground (0 V)
19
20 V

E enable input (active LOW)

to P

0

to Q

0

7

7

word inputs
word inputs

P = Q equal to output

CC

positive supply voltage

Fig.1 Pin configuration. Fig.2 Logic symbol. Fig.3 IEC logic symbol.

December 1990 3