Philips 74hc hct583 DATASHEETS

INTEGRATED CIRCUITS
DATA SH EET
The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications
The IC06 74HC/HCT/HCU/HCMOS Logic Package Information
The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines
74HC/HCT583
4-bit full adder with fast carry
Product specification Supersedes data of December 1990 File under Integrated Circuits, IC06
1998 Mar 31
Philips Semiconductors Product specification
4-bit full adder with fast carry 74HC/HCT583

FEATURES

Adds two decimal numbers
Full internal look-ahead
Fast ripple carry for economical expansion
Output capability: standard driver
ICC category: MSI
The “583” generates the decimal sum outputs ( and a carry output (C
If an addition of two BCD numbers produce a number greater than 9, a valid BCD number and a carry will result. For input values larger than 9, the number is converted from binary to BCD. Binary to BCD conversion occurs by grounding one set of inputs, An or Bn and applying a 4-bit binary number to the other set of inputs. If the input is between 0 and 9, a BCD number occurs at the output.

GENERAL DESCRIPTION

The 74HC/HCT583 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JECEC standard no. 7A.
If the binary input falls between 10 and 15, a carry term is generated. Both the carry term and the sum are the BCD equivalent of the binary input. Converting binary numbers greater than 16 may be achieved by cascading “583s”.
See the “283” for the binary version.
The 74HC/HCT583 are high-speed 4-bit BCD full adders with internal carry look-ahead. They accept two 4-bit decimal numbers (A
to A3 and B0 to B3) and a carry input
0
(CIN).

QUICK REFERENCE DATA

GND = 0 V; T
=25°C; tr=tf=6ns
amb
SYMBOL PARAMETER CONDITIONS
t
PHL/ tPLH
C
I
C
PD
propagation delay CL= 15 pF; VCC=5V
C
to C
IN
n+4
A
, Bn to C
n
n+4
input capacitance 3.5 3.5 pF power dissipation capacitance per package notes 1 and 2 116 120 pF
) if the sum is greater than 9.
n+4
TYPICAL
HC HCT
20 23 ns 23 27 ns
to 3)
0
UNIT
Notes
1. C
is used to determine the dynamic power dissipation (PD in µW):
PD
PD=CPD× V
2
× fi+ (CL× V
CC
2
× fo) where:
CC
fi= input frequency in MHz fo= output frequency in MHz (CV
2
× fo) = sum of outputs
CC
CL= output load capacitance in pF VCC= supply voltage in V
2. For HC the condition is VI= GND to V
CC
For HCT the condition is VI= GND to VCC− 1.5 V
1998 Mar 31 2
Philips Semiconductors Product specification
4-bit full adder with fast carry 74HC/HCT583

ORDERING INFORMATION

TYPE
NUMBER
NAME DESCRIPTION VERSION
PACKAGE
74HC583 DIP16 plastic dual in-line package; 16 leads (300 mil); long body SOT38-1 74HC583 SO16 plastic small outline package; 16 leads; body width 3.9 mm SOT109-1 74HCT583 DIP16 plastic dual in-line package; 16 leads (300 mil); long body SOT38-1 74HCT583 SO16 plastic small outline package; 16 leads; body width 3.9 mm SOT109-1

PIN DESCRIPTION

PIN NO. SYMBOL NAME AND FUNCTION
5C 6C
IN n+4
carry input
carry output 8 GND ground (0 V) 11, 10, 7, 9 12, 1, 2, 3 B 13, 14, 15, 4 A 16 V
to
0
to B
0
to A
0 CC
sum outputs
3
B operand inputs
3
A operand inputs
3
positive supply voltage
handbook, halfpage
C
B B B A
C
n + 4
GND
1
1
2
2
3
3
4
3
IN
2
583
5 6 7 8
MGM851
16
V
CC
15
A
2
14
A
1
13
A
0
12
B
0
11
0
10
1
9
3
andbook, halfpage
C
IN
handbook, halfpage
A
13 12 14 1 15 2
56
A
B
0
0
11 10
1
0
B
1
1
A
79
2
2
B
2
43
3
A
B
3
3
C
n + 4
MGM852
Fig.2 Logic symbol.
Fig.1 Pin configuration.
13 14 15
4
12
1 2 3 5
0
(BCD)
P
3 0
Q
3
C0C1
MGM853
11
0
10 7 9
3
6
Fig.3 IEC logic symbol.
1998 Mar 31 3
Philips Semiconductors Product specification
4-bit full adder with fast carry 74HC/HCT583
handbook, halfpage
C
5
IN
B
A 13 12 14 1 15 2
A
0
0
11 10
A
B
1
0
1
79
∑2∑
1
B
2
2
3
Fig.4 Functional diagram.
B
A
3
3
43
6
MGM854
C
n + 4
1998 Mar 31 4
Loading...
+ 9 hidden pages