Philips 74hc hct574 DATASHEETS

INTEGRATED CIRCUITS

DATA SH EET

For a complete data sheet, please also download:

•The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications

•The IC06 74HC/HCT/HCU/HCMOS Logic Package Information

•The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines

74HC/HCT574

Octal D-type flip-flop; positive
edge-trigger; 3-state

Product specification
File under Integrated Circuits, IC06

December 1990

Philips Semiconductors Product specification

Octal D-type flip-flop; positive
edge-trigger; 3-state

FEATURES

• 3-state non-inverting outputs for
bus oriented applications

• 8-bit positive edge-triggered
register

• Common 3-state output enable
input

• Independent register and 3-state
buffer operation

• Output capability: bus driver

• ICC category: MSI

QUICK REFERENCE DATA

GND = 0 V; T

=25°C; tr=tf= 6 ns

amb

SYMBOL PARAMETER CONDITIONS

t

PHL/ tPLH

f

max

C

I

C

PD

propagation delay CP to Q
maximum clock frequency 123 76 MHz
input capacitance 3.5 3.5 pF
power dissipation capacitance per flip-flop notes 1 and 2 22 25 pF

GENERAL DESCRIPTION

The 74HC/HCT574 are high-speed
Si-gate CMOS devices and are pin
compatible with low power Schottky
TTL (LSTTL). They are specified in
compliance with JEDEC standard
no. 7A.

The 74HC/HCT574 are octal D-type
flip-flops featuring separate D-type
inputs for each flip-flop and
non-inverting 3-state outputs for bus
oriented applications. A clock (CP)
and an output enable (OE) input are
common to all flip-flops.

n

CL= 15 pF; VCC=5 V 1415ns

74HC/HCT574

The 8 flip-flops will store the state of
their individual D-inputs that meet the
set-up and hold time requirements on
the LOW-to-HIGH CP transition.
When

OE is LOW, the contents of the
8 flip-flops are available at the
outputs.
When OE is HIGH, the outputs go to
the high impedance OFF-state.
Operation of the OE input does not
affect the state of the flip-flops.

The “574” is functionally identical to
the “564”, but has non-inverting
outputs.
The “574” is functionally identical to
the “374”, but has a different pinning.

TYPICAL

HC HCT

UNIT

Notes

1. C

is used to determine the dynamic power dissipation (PD in µW):

PD

PD=CPD× V

2

× fi+ ∑ (CL× V

CC

2

× fo) where:

CC

fi= input frequency in MHz
fo= output frequency in MHz
∑ (CL× V

2

× fo) = sum of outputs

CC

CL= output load capacitance in pF
VCC= supply voltage in V

2. For HC the condition is VI= GND to V

CC

For HCT the condition is VI= GND to VCC− 1.5 V

ORDERING INFORMATION

“74HC/HCT/HCU/HCMOS Logic Package Information”

See

.

December 1990 2

Philips Semiconductors Product specification

Octal D-type flip-flop; positive edge-trigger;

74HC/HCT574

3-state

PIN DESCRIPTION

PIN NO. SYMBOL NAME AND FUNCTION

1
2, 3, 4, 5, 6, 7, 8, 9 D
10 GND ground (0 V)
11 CP clock input (LOW-to-HIGH, edge-triggered)
19, 18, 17, 16, 15, 14, 13, 12 Q
20 V

OE 3-state output enable input (active LOW)

to D

0

to Q

0
CC

7

7

data inputs

3-state flip-flop outputs
positive supply voltage

Fig.1 Pin configuration. Fig.2 Logic symbol. Fig.3 IEC logic symbol.

December 1990 3