Philips 74hc hct4353 DATASHEETS

INTEGRATED CIRCUITS

DATA SH EET

For a complete data sheet, please also download:

•The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications

•The IC06 74HC/HCT/HCU/HCMOS Logic Package Information

•The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines

74HC/HCT4353

Triple 2-channel analog
multiplexer/demultiplexer with latch

Product specification
File under Integrated Circuits, IC06

December 1990

Philips Semiconductors Product specification

Triple 2-channel analog
multiplexer/demultiplexer with latch

FEATURES

• Wide analog input voltage range: ± 5 V

• Low “ON” resistance:

80 Ω (typ.) at VCC− VEE= 4.5 V
70 Ω (typ.) at VCC− VEE= 6.0 V
60 Ω (typ.) at VCC− VEE= 9.0 V

• Logic level translation:
to enable 5 V logic to communicate with ± 5 V analog
signals

• Typical “break before make” built in

• Address latches provided

• Output capability: non-standard

• ICC category: MSI

GENERAL DESCRIPTION

The 74HC/HCT4353 are high-speed Si-gate CMOS
devices. They are specified in compliance with JEDEC
standard no. 7A.

The 74HC/HCT4353 are triple 2-channel analog
multiplexers/demultiplexers with two common enable
inputs (

E1and E2) and a latch enable input (LE). Each

74HC/HCT4353

multiplexer has two independent inputs/outputs (nY0and
nY1), a common input/output (nZ) and select inputs (S1to
S3).

Each multiplexer/demultiplexer contains two bidirectional
analog switches, each with one side connected to an
independent input/output (nY0and nY1) and the other side
connected to a common input/output (nZ).

With E1LOW and E2HIGH, one of the two switches is
selected (low impedance ON-state) by S1to S3.
The data at the select inputs may be latched by using the
active LOW latch enable input (LE). When LE is HIGH, the
latch is transparent. When either of the two enable inputs,
E1(active LOW) and E2(active HIGH), is inactive, all
analog switches are turned off.

VCCand GND are the supply voltage pins for the digital
control inputs (S1to S3, LE, E1and E2). The VCCto GND
ranges are 2.0 to 10.0 V for HC and 4.5 to 5.5 V for HCT.
The analog inputs/outputs (nY0and nY1, and nZ) can
swing between VCCas a positive limit and VEEas a
negative limit. VCC− VEEmay not exceed 10.0 V.

For operation as a digital multiplexer/demultiplexer, VEEis
connected to GND (typically ground).

QUICK REFERENCE DATA

VEE= GND = 0 V; T

= 25 °C; tr= tf= 6 ns

amb

SYMBOL PARAMETER CONDITIONS

t

PZH

t

PHZ

C
C
C

I
PD
S

/ t

PZL

/ t

PLZ

turn “ON” time E1,E2or Snto V
turn “OFF” time E1,E2or Snto V

os

os

CL= 50 pF; RL=1 kΩ;
VCC= 5 V

input capacitance 3.5 3.5 pF
power dissipation capacitance per switch notes 1 and 2 23 23 pF
max. switch capacitance

independent (Y) 5 5 pF
common (Z) 8 8 pF

Notes

1. CPDis used to determine the dynamic power

dissipation (PDin µW):

PD=
CPD× V

2

× fi+ ∑ {(CL+CS)×V

CC

2

× fo} where:

CC

fi= input frequency in MHz
CL= output load capacitance in pF
fo= output frequency in MHz

∑ {(CL×CS) × V
VCC= supply voltage in V

2. For HC the condition is VI= GND to V
For HCT the condition is VI= GND to VCC− 1.5 V

ORDERING INFORMATION

“74HC/HCT/HCU/HCMOS Logic Package

See

Information”

.

CS= max. switch capacitance in pF

TYPICAL

HC HCT

29 21 ns
20 22 ns

2

× fo} = sum of outputs

CC

UNIT

CC

December 1990 2

Philips Semiconductors Product specification

Triple 2-channel analog
multiplexer/demultiplexer with latch

PIN DESCRIPTION

PIN NO. SYMBOL NAME AND FUNCTION

2, 1 2Y
5 3Z common input/output
6, 4 3Y
3, 14 n.c. not connected
7
8E
9V
10 GND ground (0 V)
11
15, 13, 12 S
16, 17 1Y
18 1Z common input/output
19 2Z common input/output
20 V

,2Y

0

1

,3Y

0

1

E

1
2
EE

independent inputs/outputs

independent inputs/outputs

enable input (active LOW)
enable input (active HIGH)
negative supply voltage

LE latch enable input (active LOW)

1

CC

to S

,1Y

0

3

1

select inputs
independent inputs/outputs

positive supply voltage

74HC/HCT4353

Fig.1 Pin configuration. Fig.2 Logic symbol. Fig.3 IEC logic symbol.

December 1990 3

Philips Semiconductors Product specification

Triple 2-channel analog
multiplexer/demultiplexer with latch

FUNCTION TABLE

INPUTS

E

1

H
X

L
L

L
X

E

2

H

L

H
H

H
X

LE S

X
X

H
H

L

↓

Notes

1. Last selected channel “ON”.

2. Selected channels latched.

H = HIGH voltage level
L = LOW voltage level
X = don’t care
↓ = HIGH-to-LOW

LE transition

n

XXnone

LHnY0 − nZ

X
X

CHANNEL

none

− nZ

nY

1

(1)
(2)

ON

74HC/HCT4353

APPLICATIONS

• Analog multiplexing and demultiplexing

• Digital multiplexing and demultiplexing

• Signal gating

Fig.4 Functional diagram.

Fig.5 Schematic diagram (one switch).

December 1990 4

Philips Semiconductors Product specification

Triple 2-channel analog
multiplexer/demultiplexer with latch

RATINGS

Limiting values in accordance with the Absolute Maximum System (IEC 134)
Voltages are referenced to VEE= GND (ground = 0 V)

SYMBOL PARAMETER MIN. MAX. UNIT CONDITIONS

V

CC

±I

IK

±I

SK

±I

S

±I

EE

±I

;

CC

±I

GND

T

stg

P

tot

P

S

DC supply voltage −0.5 +11.0 V
DC digital input diode current 20 mA for VI<−0.5 V or VI> VCC+ 0.5 V
DC switch diode current 20 mA for VS<−0.5 V or VS> VCC+ 0.5 V
DC switch current 25 mA for −0.5 V < VS< VCC+ 0.5 V
DC VEEcurrent 20 mA
DC VCCor GND current 50 mA

storage temperature range −65 +150 °C
power dissipation per package for temperature range: −40 to +125 °C

74HC/HCT
plastic DIL 750 mW above +70 °C: derate linearly with 12 mW/K
plastic mini-pack (SO) 500 mW above +70 °C: derate linearly with 8 mW/K
power dissipation per switch 100 mW

74HC/HCT4353

Note to ratings

1. To avoid drawing V

current out of terminals nZ, when switch current flows in terminals nYn, the voltage drop across

CC

the bidirectional switch must not exceed 0.4 V. If the switch current flows into terminals nZ, no VCCcurrent will flow
out of terminals nYn. In this case there is no limit for the voltage drop across the switch, but the voltages at nYnand
nZ may not exceed VCCor VEE.

RECOMMENDED OPERATING CONDITIONS

74HC 74HCT

SYMBOL PARAMETER

UNIT CONDITIONS

min. typ. max. min. typ. max.

V
V
V
V
T
T

t

r,tf

CC
CC
I
S
amb
amb

DC supply voltage VCC−GND 2.0 5.0 10.0 4.5 5.0 5.5 V see Figs 6 and 7
DC supply voltage VCC−V

EE

DC input voltage range GND V
DC switch voltage range V

2.0 5.0 10.0 2.0 5.0 10.0 V see Figs 6 and 7

EE

GND V

CC

V

CC

V

EE

V

CC
CC

V

V
operating ambient temperature range −40 +85 −40 +85 °C see DC and AC
operating ambient temperature range −40 +125 −40 +125 °C

CHARACTER­ISTICS

input rise and fall times

6.0

1000
500
400
250

6.0 500 ns

VCC= 2.0 V
VCC= 4.5 V
VCC= 6.0 V
VCC= 10.0 V

December 1990 5