Philips 74hc hct4316 DATASHEETS

INTEGRATED CIRCUITS
DATA SH EET
For a complete data sheet, please also download:
The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines
74HC/HCT4316
Quad bilateral switches
Product specification File under Integrated Circuits, IC06
September 1993
Philips Semiconductors Product specification
Quad bilateral switches 74HC/HCT4316

FEATURES

Low “ON” resistance: 160 (typ.) at VCC− VEE= 4.5 V
120 (typ.) at VCC− VEE= 6.0 V
80 (typ.) at VCC− VEE= 9.0 V
Logic level translation: to enable 5 V logic to communicate with ± 5 V analog signals
Typical “break before make” built in
Output capability: non-standard
ICC category: MSI
The 74HC/HCT4316 have four independent analog switches. Each switch has two input/output terminals (nY, nZ) and an active HIGH select input (nS). When the enable input ( turned off.
Current through a switch will not cause additional V current provided the voltage at the terminals of the switch is maintained within the supply voltage range; VCC>> (VY, VZ) >> VEE. Inputs nY and nZ are electrically equivalent terminals.
VCC and GND are the supply voltage pins for the digital control inputs (E and nS). The VCC to GND ranges are 2.0 to 10.0 V for HC and 4.5 to 5.5 V for HCT.

GENERAL DESCRIPTION

The 74HC/HCT4316 are high-speed Si-gate CMOS devices. They are specified in compliance with JEDEC standard no. 7A.
The analog inputs/outputs (nY and nZ) can swing between VCC as a positive limit and VEE as a negative limit. VCC− VEE may not exceed 10.0 V.
See the “4016” for the version without logic level translation.

QUICK REFERENCE DATA

VEE= GND = 0 V; T
=25°C; tr=tf= 6 ns
amb
SYMBOL PARAMETER CONDITIONS
t
PZH
t
PZL
t
PHZ
C C C
/ t
I PD S
turn “ON” time CL= 15 pF; RL=1 kΩ;
E to V nS to V
OS
OS
VCC=5 V
turn “ON” time
E to V
OS
turn “OFF” time
PLZ
nS to V
E to V nS to V
OS
OS
OS
input capacitance 3.5 3.5 pF power dissipation capacitance per switch notes 1 and 2 13 14 pF max. switch capacitance 5 5 pF
E) is HIGH, all four analog switches are
CC
TYPICAL
UNIT
HC HCT
19 19 ns 16 17 ns
19 24 ns 16 21 ns
20 21 ns 16 19 ns
Notes
1. CPD is used to determine the dynamic power
dissipation (PD in µW):
PD=CPD× V
2
× fi+∑{(CL+CS)×V
CC
CC
2
× fo}
where: fi= input frequency in MHz fo= output frequency in MHz {(CL+CS)×V
2
× fo} = sum of outputs
CC
September 1993 2
CL= output load capacitance in pF CS= max. switch capacitance in pF VCC= supply voltage in V
2. For HC the condition is VI= GND to V
CC
For HCT the condition is VI= GND to VCC− 1.5 V
Philips Semiconductors Product specification
Quad bilateral switches 74HC/HCT4316

ORDERING INFORMATION

See
“74HC/HCT/HCU/HCMOS Logic Package Information”

PIN DESCRIPTION

PIN NO. SYMBOL NAME AND FUNCTION
1, 4, 10, 13 1Z to 4Z independent inputs/outputs 2, 3, 11, 12 1Y to 4Y independent inputs/outputs 7
E enable input (active LOW) 8 GND ground (0 V) 9V
EE
negative supply voltage 15, 5, 6, 14 1S to 4S select inputs (active HIGH) 16 V
CC
positive supply voltage
.
Fig.1 Pin configuration. Fig.2 Logic symbol. Fig.3 IEC logic symbol.
September 1993 3
(b)
Philips Semiconductors Product specification
Quad bilateral switches 74HC/HCT4316

FUNCTION TABLE

INPUTS
EnS
L L
H X off
Note
1. H = HIGH voltage level L = LOW voltage level X = don’t care

APPLICATIONS

Signal gating
Modulation
Demodulation
Chopper
SWITCH
L
H
off on
Fig.4 Functional diagram.
Fig.5 Schematic diagram (one switch).
September 1993 4
Philips Semiconductors Product specification
Quad bilateral switches 74HC/HCT4316

RATINGS

Limiting values in accordance with the Absolute Maximum System (IEC 134) Voltages are referenced to VEE= GND (ground = 0 V)
SYMBOL PARAMETER MIN. MAX. UNIT CONDITIONS
V
CC
±I
IK
±I
SK
±I
S
±I
EE
±I
;
CC
±I
GND
T
stg
P
tot
P
S
DC supply voltage 0.5 +11.0 V DC digital input diode current 20 mA for VI<−0.5 V or VI> VCC+ 0.5 V DC switch diode current 20 mA for VS<−0.5 V or VS> VCC+ 0.5 V DC switch current 25 mA for 0.5 V < VS< VCC+ 0.5 V DC VEE current 20 mA DC VCC or GND current 50 mA
storage temperature range 65 +150 °C power dissipation per package for temperature range: 40 to +125 °C
74HC/HCT plastic DIL 750 mW above +70 °C: derate linearly with 12 mW/K plastic mini-pack (SO) 500 mW above +70 °C: derate linearly with 8 mW/K power dissipation per switch 100 mW
Note to ratings
To avoid drawing V
current out of terminal Z, when switch current flows in terminals Yn, the voltage drop across the
CC
bidirectional switch must not exceed 0.4 V. If the switch current flows into terminals Z, no VCC current will flow out of terminal Yn. In this case there is no limit for the voltage drop across the switch, but the voltages at Yn and Z may not exceed VCC or VEE.

RECOMMENDED OPERATING CONDITIONS

74HC 74HCT
SYMBOL PARAMETER
UNIT CONDITIONS
min. typ. max. min. typ. max.
V
CC
V
CC
V
I
V
S
T
amb
T
amb
t
, t
r
f
DC supply voltage VCC−GND 2.0 5.0 10.0 4.5 5.0 5.5 V see Figs 6 and 7 DC supply voltage VCC−V
EE
DC input voltage range GND V DC switch voltage range V
2.0 5.0 10.0 2.0 5.0 10.0 V see Figs 6 and 7
EE
CC
V
CC
GND V V
EE
V
CC CC
V
V operating ambient temperature range 40 +85 40 +85 °C see DC and AC operating ambient temperature range 40 +125 40 +125 °C input rise and fall times
6.0
1000 500 400
6.0 500
250
CHARACTERISTICS
ns VCC= 2.0 V
VCC= 4.5 V VCC= 6.0 V VCC= 10.0 V
September 1993 5
Loading...
+ 10 hidden pages