Philips 74hc hct4053 DATASHEETS

INTEGRATED CIRCUITS

DATA SH EET

For a complete data sheet, please also download:

•The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications

•The IC06 74HC/HCT/HCU/HCMOS Logic Package Information

•The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines

74HC/HCT4053

Triple 2-channel analog
multiplexer/demultiplexer

Product specification
File under Integrated Circuits, IC06

December 1990

Philips Semiconductors Product specification

Triple 2-channel analog
multiplexer/demultiplexer

FEATURES

• Low “ON” resistance:
80 Ω(typ.) at VCC− VEE= 4.5 V
70 Ω (typ.) at VCC− VEE= 6.0 V
60 Ω (typ.) at VCC− VEE= 9.0 V

• Logic level translation:
to enable 5 V logic to communicate
with ± 5 V analog signals

• Typical “break before make” built in

• Output capability: non-standard

• ICC category: MSI

GENERAL DESCRIPTION

The 74HC/HCT4053 are high-speed Si-gate CMOS
devices and are pin compatible with the “4053” of the
“4000B” series. They are specified in compliance with
JEDEC standard no. 7A.

74HC/HCT4053

The 74HC/HCT4053 are triple 2-channel analog
multiplexers/demultiplexers with a common enable input
(

E). Each multiplexer/demultiplexer has two independent
inputs/outputs (nY0 and nY1), a common input/output (nZ)
and three digital select inputs (S1 to S3).

With E LOW, one of the two switches is selected (low
impedance ON-state) by S1 to S3. With E HIGH, all
switches are in the high impedance OFF-state,
independent of S1 to S3.

VCC and GND are the supply voltage pins for the digital
control inputs (S1, to S3, and E). The VCC to GND ranges
are 2.0 to 10.0 V for HC and 4.5 to 5.5 V for HCT. The
analog inputs/outputs (nY0 and nY1, and nZ) can swing
between VCC as a positive limit and VEE as a negative limit.
VCC− VEE may not exceed 10.0 V.

For operation as a digital multiplexer/demultiplexer, VEE is
connected to GND (typically ground).

QUICK REFERENCE DATA

VEE= GND = 0 V; T

=25°C; tr=tf= 6 ns

amb

SYMBOL PARAMETER CONDITIONS

t

PZH

t

PHZ

C
C
C

I
PD
S

/ t

PZL

/ t

PLZ

turn “ON” time CL= 15 pF; RL=1 kΩ; VCC=5 V

E to V

OS

S

to V

n

OS

turn “OFF” time

E to V

OS

S

to V

n

OS

input capacitance 3.5 3.5 pF
power dissipation capacitance per switch notes 1 and 2 36 36 pF
max. switch capacitance

independent (Y) 5 5 pF
common (Z) 8 8 pF

Notes

1. C

is used to determine the dynamic power dissipation (PD in µW):

PD

PD=CPD× V

2

× fi+∑ {(CL+CS) × V

CC

2

× fo} where:

CC

fi= input frequency in MHz; fo= output frequency in MHz
∑ {(CL+CS) × V

2

× fo} = sum of outputs

CC

CL= output load capacitance in pF; CS= max. switch capacitance in pF
VCC= supply voltage in V

2. For HC the condition is VI= GND to V

CC

For HCT the condition is VI= GND to VCC− 1.5 V

TYPICAL

UNIT

HC HCT

17 23 ns
21 21 ns

18 20 ns
17 19 ns

December 1990 2

Philips Semiconductors Product specification

Triple 2-channel analog
multiplexer/demultiplexer

ORDERING INFORMATION

See

“74HC/HCT/HCU/HCMOS Logic Package Information”

PIN DESCRIPTION

PIN NO. SYMBOL NAME AND FUNCTION

2, 1 2Y
5, 3 3Y
6
7V

to, 2Y

0

to, 3Y

0

1
1

independent inputs/outputs
independent inputs/outputs

E enable input (active LOW)

EE

negative supply voltage
8 GND ground (0 V)
11, 10, 9 S
12, 13 1Y

to S

1

0

, 1Y

3

1

select inputs

independent inputs/outputs
14, 15, 4 1Z to 3Z common inputs/outputs
16 V

CC

positive supply voltage

.

74HC/HCT4053

Fig.1 Pin configuration. Fig.2 Logic symbol. Fig.3 IEC logic symbol.

December 1990 3

Philips Semiconductors Product specification

Triple 2-channel analog
multiplexer/demultiplexer

APPLICATIONS

• Analog multiplexing and demultiplexing

• Digital multiplexing and demultiplexing

• Signal gating

FUNCTION TABLE

INPUTS

ES

L
L

H X none

Note

1. H = HIGH voltage level
L = LOW voltage level
X = don’t care

n

L
H

CHANNEL ON

nY0− nZ

nY1 − nZ

74HC/HCT4053

Fig.4 Functional diagram.

Fig.5 Schematic diagram (one switch).

December 1990 4

Philips Semiconductors Product specification

Triple 2-channel analog

74HC/HCT4053

multiplexer/demultiplexer

RATINGS

Limiting values in accordance with the Absolute Maximum System (IEC 134)
Voltages are referenced to VEE= GND (ground = 0 V)

SYMBOL PARAMETER MIN. MAX. UNIT CONDITIONS

V

CC

±I

IK

±I

SK

±I

S

±I

EE

±I

; ±I

CC

T

stg

P

tot

P

S

DC supply voltage −0.5 +11.0 V
DC digital input diode current 20 mA for VI<−0.5 V or VI> VCC + 0.5 V
DC switch diode current 20 mA for VS<−0.5 V or VS> VCC + 0.5 V
DC switch current 25 mA for −0.5 V < VS< VCC + 0.5 V
DC VEE current 20 mA
DC VCC or GND current 50 mA

GND

storage temperature range −65 +150 °C
power dissipation per package for temperature range: −40 to + 125 °C

74HC/HCT
plastic DIL 750 mW above + 70 °C: derate linearly with 12 mW/K
plastic mini-pack (SO) 500 mW above + 70 °C: derate linearly with 8 mW/K
power dissipation per switch 100 mW

Note to ratings

To avoid drawing V

current out of terminals nZ, when switch current flows in terminals nYn, the voltage drop across

CC

the bidirectional switch must not exceed 0.4 V. If the switch current flows into terminals nZ, no VCC current will flow out
of terminals nYn. In this case there is no limit for the voltage drop across the switch, but the voltages at nYn and nZ may
not exceed VCC or VEE.

RECOMMENDED OPERATING CONDITIONS

74HC 74HCT

SYMBOL PARAMETER

UNIT CONDITIONS

min. typ. max. min. typ. max.

V

CC

V

CC

V

I

V

S

T

amb

T

amb

DC supply voltage VCC−GND 2.0 5.0 10.0 4.5 5.0 5.5 V see Figs 6 and 7
DC supply voltage VCC−V

EE

DC input voltage range GND V
DC switch voltage range V
operating ambient temperature

range
operating ambient temperature

2.0 5.0 10.0 2.0 5.0 10.0 V see Figs 6 and 7

EE

GND V

CC

V

CC

V

EE

CC

V

CC

V
V

−40 +85 −40 +85 °C
see DC and AC

−40 +125 −40 +125 °C

CHARACTERISTICS

range

1000

, t

t

r

f

input rise and fall times 6.0

500
400

6.0 500 ns

250

VCC= 2.0 V
VCC= 4.5 V
VCC= 6.0 V
VCC= 10.0 V

December 1990 5

Philips Semiconductors Product specification

Triple 2-channel analog
multiplexer/demultiplexer

Fig.6 Guaranteed operating area as a function of

the supply voltages for 74HC4053.

DC CHARACTERISTICS FOR 74HC/HCT

For 74HC: V
For 74HCT: V

− GND or VCC− VEE= 2.0, 4.5, 6.0 and 9.0 V

CC

− GND = 4.5 and 5.5 V; VCC− VEE= 2.0, 4.5, 6.0 and 9.0 V

CC

74HC/HCT4053

Fig.7 Guaranteed operating area as a function

of the supply voltages for 74HCT4053.

T

amb

(°C)

TEST CONDITIONS

74HC/HCT

SYMBOL PARAMETER

R

ON

ON resistance
(peak)

R

ON

ON resistance
(rail)

R

ON

ON resistance
(rail)

∆R

ON

maximum ∆ON
resistance
between any two
channels

+ 25 −40 to +85 −40 to +125

min. typ. max. min. max. min. max.

−

100
90
70

150
80
70
60

150
90
80
65

−

180
160
130

−

140
120
105

−

160
140
120

−

225
200
165

−

175
150
130

−

200
175
150

−

270
240
195

−

210
180
160

−

240
210
180

−

9
8
6

UNIT

Ω
Ω
Ω
Ω

Ω
Ω
Ω
Ω

Ω
Ω
Ω
Ω

Ω
Ω
Ω
Ω

V

(V)

2.0

4.5

6.0

4.5

2.0

4.5

6.0

4.5

2.0

4.5

6.0

4.5

2.0

4.5

6.0

4.5

CC

V

EE

(V)

0
0
0

−4.5
0

0
0

−4.5
0

0
0

−4.5
0

0
0

−4.5

I

S

(µA)

100
1000
1000
1000

100
1000
1000
1000

100
1000
1000
1000

V
to
V

V

V

V
to
V

Notes to the characteristics

1. At supply voltages (V

− VEE) approaching 2.0 V the analog switch ON-resistance becomes extremely non-linear.

CC

Therefore it is recommended that these devices be used to transmit digital signals only, when using these supply
voltages.

2. For test circuit measuring RON see Fig.8.

V

is

CC

EE

EEVIH

CCVIH

CC

EE

V
or
V

or
V

or
V

V
or
V

V

I

IH

IL

IL

IL

IH

IL

December 1990 6