Philips 74hc hct365 DATASHEETS

INTEGRATED CIRCUITS

DATA SH EET

For a complete data sheet, please also download:

•The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications

•The IC06 74HC/HCT/HCU/HCMOS Logic Package Information

•The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines

74HC/HCT365

Hex buffer/line driver; 3-state

Product specification
File under Integrated Circuits, IC06

December 1990

Philips Semiconductors Product specification

Hex buffer/line driver; 3-state 74HC/HCT365

FEATURES

• Non-inverting outputs

• Output capability: bus driver

• ICC category: MSI

The 74HC/HCT365 are hex non-inverting buffer/line
drivers with 3-state outputs. The 3-state outputs (nY) are
controlled by the output enable inputs (

A HIGH on OEn causes the outputs to assume a high
impedance OFF-state.

The “365” is identical to the “366” but has non-inverting

GENERAL DESCRIPTION

outputs.

The 74HC/HCT365 are high-speed Si-gate CMOS devices
and are pin compatible with low power Schottky TTL
(LSTTL). They are specified in compliance with JEDEC
standard no. 7A.

QUICK REFERENCE DATA

GND = 0 V; T

=25°C; tr=tf= 6 ns

amb

SYMBOL PARAMETER CONDITIONS

t

PHL

/ t

PLH

propagation delay

CL= 15 pF; VCC=5 V 9 11 ns

nA to nY
C
C

I
PD

input capacitance 3,5 3,5 pF
power dissipation capacitance per buffer notes 1 and 2 40 40 pF

Notes

1. C

is used to determine the dynamic power dissipation (PD in µW):

PD

PD=CPD× V

2

× fi + ∑ (CL× V

CC

2

× fo) where:

CC

fi= input frequency in MHz
fo= output frequency in MHz
∑ (CL× V

2

× fo) = sum of outputs

CC

CL= output load capacitance in pF
VCC= supply voltage in V

2. For HC the condition is VI= GND to V

CC

For HCT the condition is VI= GND to VCC− 1.5 V

OE1, OE2).

TYPICAL

UNIT

HC HCT

ORDERING INFORMATION

See

“74HC/HCT/HCU/HCMOS Logic Package Information”

December 1990 2

.

Philips Semiconductors Product specification

Hex buffer/line driver; 3-state 74HC/HCT365

PIN DESCRIPTION

PIN NO. SYMBOL NAME AND FUNCTION

1, 15
2, 4, 6, 10, 12, 14 1A to 6A data inputs
3, 5, 7, 9, 11, 13 1Y to 6Y data outputs
8 GND ground (0 V)
16 V

OE1, OE

CC

2

output enable inputs (active LOW)

positive supply voltage

Fig.1 Pin configuration. Fig.2 Fig.3 IEC logic symbol.

December 1990 3