Philips 74hc hct283 DATASHEETS
INTEGRATED CIRCUITS
DATA SH EET
For a complete data sheet, please also download:
•The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications
•The IC06 74HC/HCT/HCU/HCMOS Logic Package Information
•The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines
74HC/HCT283
4-bit binary full adder with fast carry
Product specification
File under Integrated Circuits, IC06
December 1990
Philips Semiconductors Product specification
4-bit binary full adder with fast carry 74HC/HCT283
FEATURES
• High-speed 4-bit binary addition
• Cascadable in 4-bit increments
• Fast internal look-ahead carry
• Output capability: standard
• ICC category: MSI
CIN+ (A1+ B1) +2(A2+ B2) ++4(A3+ B3) + 8(A4+ B4)=
=∑1+2∑2+4∑3+8∑4+16C
Where (+) = plus.
Due to the symmetry of the binary add function, the “283”
can be used with either all active HIGH operands (positive
logic) or all active LOW operands (negative logic); see
function table. In case of all active LOW operands the
results ∑1 to ∑4 and C
GENERAL DESCRIPTION
active LOW. With active HIGH inputs, CIN must be held
LOW when no “carry in” is intended. Interchanging inputs
The 74HC/HCT283 are high-speed Si-gate CMOS devices
and are pin compatible with low power Schottky TTL
of equal weight does not affect the operation, thus CIN, A1,
B1 can be assigned arbitrarily to pins 5, 6, 7, etc.
(LSTTL). They are specified in compliance with JEDEC
standard no. 7A.
The 74HC/HCT283 add two 4-bit binary words (A
plus Bn)
n
See the “583” for the BCD version.
plus the incoming carry. The binary sum appears on the
sum outputs (∑1 to ∑4) and the out-going carry (C
OUT
)
according to the equation:
QUICK REFERENCE DATA
GND = 0 V; T
=25°C; tr=tf= 6 ns
amb
SYMBOL PARAMETER CONDITIONS
t
PHL
C
C
I
PD
/ t
PLH
propagation delay CL= 15 pF; VCC=5 V
C
to ∑
IN
1
C
to ∑
IN
2
C
to ∑
IN
3
C
to ∑
IN
4
A
or Bn to ∑
n
C
to C
IN
or Bn to C
A
n
n
OUT
OUT
input capacitance 3.5 3.5 pF
power dissipation capacitance per package notes 1 and 2 88 92 pF
OUT
should be interpreted also as
OUT
TYPICAL
HC HCT
16 15 ns
18 21 ns
20 23 ns
23 27 ns
21 25 ns
20 23 ns
20 24 ns
UNIT
Notes
1. C
is used to determine the dynamic power dissipation (PD in µW):
PD
PD=CPD× V
2
× fi+∑(CL× V
CC
2
× fo) where:
CC
fi= input frequency in MHz
fo= output frequency in MHz
∑ (CL× V
2
× fo) = sum of outputs
CC
CL= output load capacitance in pF
VCC= supply voltage in V
2. For HC the condition is VI= GND to V
CC
For HCT the condition is VI= GND to VCC− 1.5 V
December 1990 2
Philips Semiconductors Product specification
4-bit binary full adder with fast carry 74HC/HCT283
ORDERING INFORMATION
See
“74HC/HCT/HCU/HCMOS Logic Package Information”
PIN DESCRIPTION
PIN NO. SYMBOL NAME AND FUNCTION
4, 1, 13, 10 ∑
5, 3, 14, 12 A
6, 2, 15, 11 B
7C
to ∑
1
to A
1
to B
1
IN
4
4
4
sum outputs
A operand inputs
B operand inputs
carry input
8 GND ground (0 V)
9C
16 V
OUT
CC
carry output
positive supply voltage
.
Fig.1 Pin configuration. Fig.2 Logic symbol. Fig.3 IEC logic symbol.
December 1990 3
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