INTEGRATED CIRCUITS
DATA SH EET
For a complete data sheet, please also download:
•The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications
•The IC06 74HC/HCT/HCU/HCMOS Logic Package Information
•The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines
74HC/HCT251
8-input multiplexer; 3-state
Product specification
File under Integrated Circuits, IC06
December 1990
Philips Semiconductors Product specification
8-input multiplexer; 3-state 74HC/HCT251
FEATURES
• True and complement outputs
• Both outputs are 3-state for further multiplexer
expansion
• Multifunction capability
• Permits multiplexing from n-lines to one line
• Output capability: standard
• ICC category: MSI
GENERAL DESCRIPTION
The 74HC/HCT251 are high-speed Si-gate CMOS devices
The 74HC/HCT251 are the logic implementations of
single-pole 8-position switches with the state of three
select inputs (S
Assertion (Y) and negation (Y) outputs are both provided.
The output enable input (OE) is active LOW. The logic
function provided at the output, when activated, is:
Y=OE.(I0.S0.S1.S2 + I1.S0.S1.S2+
+ I2.S0.S1.S2+ I3.S0.S1.S2+
+ I4.S0.S1.S2+ I5.S0.S1.S2+
+ I6.S0.S1.S2+ I7.S0.S1.S2)
Both outputs are in the high impedance OFF-state (Z)
when the output enable input is HIGH, allowing multiplexer
expansion by tying the outputs.
and are pin compatible with low power Schottky TTL
(LSTTL). They are specified in compliance with JEDEC
standard no. 7A.
QUICK REFERENCE DATA
GND = 0 V; T
= 25 °C; tr= tf= 6 ns
amb
SYMBOL PARAMETER CONDITIONS
/ t
t
PHL
PLH
C
I
C
PD
propagation delay CL= 15 pF; VCC= 5 V
I
to Y 15 19 ns
n
I
to Y1719ns
n
to Y 20 20 ns
S
n
S
to Y2121ns
n
input capacitance 3.5 3.5 pF
power dissipation capacitance per package notes 1 and 2 44 46 pF
0,S1,S2
) controlling the switch positions.
TYPICAL
UNIT
HC HCT
Notes
1. C
is used to determine the dynamic power dissipation (PDin µW):
PD
PD= CPD× V
2
× fi+∑(CL× V
CC
2
× fo) where:
CC
fi= input frequency in MHz
fo= output frequency in MHz
∑ (CL× V
2
× fo) = sum of outputs
CC
CL= output load capacitance in pF
VCC= supply voltage in V
2. For HC the condition is VI= GND to V
CC
For HCT the condition is VI= GND to VCC− 1.5 V
ORDERING INFORMATION
“74HC/HCT/HCU/HCMOS Logic Package Information”
See
December 1990 2
.
Philips Semiconductors Product specification
8-input multiplexer; 3-state 74HC/HCT251
PIN DESCRIPTION
PIN NO. SYMBOL NAME AND FUNCTION
4, 3, 2, 1, 15, 14, 13, 12 I
5 Y multiplexer output
6
7
8 GND ground (0 V)
11, 10, 9 S
16 V
to I
0
7
multiplexer inputs
Y complementary multiplexer output
OE 3-state output enable input (active LOW)
0,S1,S2
CC
select inputs
positive supply voltage
Fig.1 Pin configuration. Fig.2 Logic symbol. Fig.3 IEC logic symbol.
December 1990 3