Philips 74hc hct221 DATASHEETS
INTEGRATED CIRCUITS
DATA SH EET
For a complete data sheet, please also download:
•The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications
•The IC06 74HC/HCT/HCU/HCMOS Logic Package Information
•The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines
74HC/HCT221
Dual non-retriggerable monostable
multivibrator with reset
Product specification
Supersedes data of April 1988
File under Integrated Circuits, IC06
December 1990
Philips Semiconductors Product specification
Dual non-retriggerable monostable
multivibrator with reset
FEATURES
• Pulse width variance is typically less than ±5%
• Pin-out identical to “123”
• Overriding reset terminates output pulse
• nB inputs have hysteresis for improved noise immunity
• Output capability: standard (except for nR
EXT/CEXT
• ICC category: MSI
GENERAL DESCRIPTION
The 74HC/HCT221 are high-speed Si-gate CMOS devices
and are pin compatible with low power Schottky TTL
(LSTTL). They are specified in compliance with JEDEC
standard no. 7A.
The 74HC/HCT221 are dual non-retriggerable monostable
multivibrators. Each multivibrator features an active
LOW-going edge input (n
A) and an active HIGH-going
edge input (nB), either of which can be used as an enable
input.
Pulse triggering occurs at a particular voltage level and is
not directly related to the transition time of the input pulse.
Schmitt-trigger input circuitry for the nB inputs allow
)
74HC/HCT221
jitter-free triggering from inputs with slow transition rates,
providing the circuit with excellent noise immunity.
Once triggered, the outputs (nQ, nQ) are independent of
further transitions of nA and nB inputs and are a function
of the timing components. The output pulses can be
terminated by the overriding active LOW reset inputs
(nRD). Input pulses may be of any duration relative to the
output pulse.
Pulse width stability is achieved through internal
compensation and is virtually independent of VCC and
temperature. In most applications pulse stability will only
be limited by the accuracy of the external timing
components.
The output pulse width is defined by the following
relationship:
tW=C
EXTREXTIn2
tW= 0.7C
Pin assignments for the “221” are identical to those of the
“123” so that the “221” can be substituted for those
products in systems not using the retrigger by merely
changing the value of R
EXTREXT
and/or C
EXT
EXT
.
QUICK REFERENCE DATA
GND = 0 V; T
=25°C; tr=tf= 6 ns
amb
SYMBOL PARAMETER CONDITIONS
t
PHL
t
PLH
C
I
C
PD
propagation delay C
nA, nB, nRD to nQ, nQ 2932ns
nA, nB, nRD to nQ, nQ 3536ns
input capacitance 3.5 3.5 pF
power dissipation capacitance per package notes 1 and 2 90 96 pF
= 15 pF; VCC=5 V;
L
R
=5 kΩ; C
EXT
Notes
1. C
is used to determine the dynamic power dissipation (PD in µW):
PD
PD=CPD× V
2
× fi+∑(CL× V
CC
2
× fo) + 0.33 × C
CC
EXT
× V
CC
2
fi= input frequency in MHz; fo= output frequency in MHz
∑ (CL× V
C
EXT
2
× fo) = sum of outputs
CC
= timing capacitance in pF; CL= output load capacitance in pF
VCC= supply voltage in V; D = duty factor in %
2. For HC the condition is VI= GND to V
CC
For HCT the condition is VI= GND to VCC− 1.5 V
HC HCT
= 0 pF
EXT
× fo+ D × 28 × VCCwhere:
TYPICAL
UNIT
December 1990 2
Philips Semiconductors Product specification
Dual non-retriggerable monostable
multivibrator with reset
ORDERING INFORMATION
See
“74HC/HCT/HCU/HCMOS Logic Package Information”
PIN DESCRIPTION
PIN NO. SYMBOL NAME AND FUNCTION
1, 9 1
2, 10 1B, 2B trigger inputs (positive-edge triggered)
3, 11 1
4, 12 1
72R
8 GND ground (0 V)
13, 5 1Q, 2Q outputs (active HIGH)
14, 6 1C
15 1R
16 V
A, 2A trigger inputs (negative-edge triggered)
RD, 2R
D
Q, 2Q outputs (active LOW)
EXT/CEXT
, 2C
EXT
EXT/CEXT
CC
EXT
direct reset inputs (active LOW)
external resistor/capacitor connection
external capacitor connection
external resistor/capacitor connection
positive supply voltage
.
74HC/HCT221
Fig.1 Pin configuration. Fig.2 Logic symbol. Fig.3 IEC logic symbol.
December 1990 3
Philips Semiconductors Product specification
Dual non-retriggerable monostable
multivibrator with reset
Fig.4 Functional diagram.
74HC/HCT221
FUNCTION TABLE
INPUTS OUTPUTS
nR
D
LXXLH
XHXL
XXLL
HL↑
H↓H
↑LH
Notes
1. H = HIGH voltage level
L = LOW voltage level
X = don’t care
↑ = LOW-to-HIGH level
↓ = HIGH-to-LOW level
2. If the monostable was triggered before this condition
was established the pulse will continue as
programmed.
3. For this combination the reset input must be LOW and
the following sequence must be used:
pin 1 (or 9) must be set HIGH or pin 2 (or 10) set LOW;
then pin 1 (or 9) must be LOW and pin 2 (or 10) set
HIGH. Now the reset input goes from LOW-to-HIGH
and the device will be triggered.
nAnBnQnQ
(2)
(2)
= one HIGH-level output pulse
= one LOW-level output pulse
H
H
(3) (3)
(2)
(2)
December 1990 4
Philips Semiconductors Product specification
Dual non-retriggerable monostable
multivibrator with reset
74HC/HCT221
Fig.5 Logic diagram.
Note
It is recommended to ground pins 6 (2C
December 1990 5
) and 14 (1C
EXT
Fig.6 Timing component connections.
EXT
) externally to pin 8 (GND).
Loading...