Philips 74hc hct123 DATASHEETS

INTEGRATED CIRCUITS
DATA SH EET
For a complete data sheet, please also download:
The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications
The IC06 74HC/HCT/HCU/HCMOS Logic Package Information
The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines
74HC/HCT123
Dual retriggerable monostable multivibrator with reset
Product specification Supersedes data of September 1993 File under Integrated Circuits, IC06
1998 Jul 08
Philips Semiconductors Product specification
Dual retriggerable monostable multivibrator with reset

FEATURES

DC triggered from active HIGH or active LOW inputs
Retriggerable for very long pulses up to 100% duty factor
Direct reset terminates output pulse
Schmitt-trigger action on all inputs except for the reset input
Output capability: standard (except for nR
EXT/CEXT
)
ICC category: MSI

GENERAL DESCRIPTION

The 74HC/HCT123 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A.
The 74HC/HCT123 are dual retriggerable monostable multivibrators with output pulse width control by three methods. The basic pulse time is programmed by selection of an external resistor
) and capacitor (C
(R
EXT
EXT
). The external resistor and capacitor are normally connected as shown in Fig.6.
Once triggered, the basic output pulse width may be extended by retriggering the gated active LOW-going edge input (nA) or the active HIGH-going edge input (nB). By repeating this process, the output pulse period (nQ = HIGH, nQ = LOW) can be made as long as desired. Alternatively an output delay can be terminated at any time by a LOW-going edge on input nRD, which also inhibits the triggering.
and early reset. The basic output pulse width is essentially determined by the values of the external timing components R pulse widths, when C see Fig.9.
When C output pulse width is defined as:
tW= 0.45 × R

QUICK REFERENCE DATA

GND = 0 V; T
SYMBOL PARAMETER CONDITIONS
t
PHL
C
I
C
PD
Notes
1. C
2. For HC the condition is VI= GND to V
74HC/HCT123
where: t
= pulse width in ns;
W
R
= external resistor in k;
EXT
and C
EXT
> 10 000 pF, the typical
EXT
× C
EXT
=25°C; tr=tf=6ns
amb
/ t
propagation delay CL=15pF;
PLH
n
A, nB to nQ, nQ2626ns
nRD to nQ, nQ
input capacitance 3.5 3.5 pF power dissipation
capacitance per monostable
is used to determine the dynamic power dissipation (PD in µW):
PD
PD=CPD× V
2
× V
× fo+ D × 16 × VCC where:
CC
CC
2
fi= input frequency in MHz fo= output frequency in MHz D = duty factor in % CL= output load capacitance in pF VCC= supply voltage in V C
= timing capacitance in pF
EXT
(CV
2
× fo) sum of outputs
CC
For HCT the condition is VI= GND to VCC− 1.5 V
. For
EXT
< 10 000 pF,
EXT
(typ.),
EXT
× fi+ (CL× V
C
= external capacitor in pF.
EXT
Schmitt-trigger action in the nA and nB inputs, makes the circuit highly tolerant to slower input rise and fall times.
The ‘123’ is identical to the ‘423’ but can be triggered via the reset input.
TYPICAL
HC HCT
VCC=5V; R
=5kΩ;
C
EXT EXT
=0pF
20 23 ns
notes 1 and 2 54 56 pF
2
× fo) + 0.75 × C
CC
CC
EXT
UNIT
An internal connection from nRD to the input gates makes it possible to trigger the circuit by a positive-going signal at input nRD as shown in the function table. Figures 7 and 8 illustrate pulse control by retriggering
1998 Jul 08 2
Philips Semiconductors Product specification
Dual retriggerable monostable multivibrator with reset

ORDERING INFORMATION

TYPE
NUMBER
74HC123N; 74HCT123N
74HC123D; 74HCT123D
74HC123DB; 74HCT123DB
74HC123PW; 74HCT123PW

PIN DESCRIPTION

PIN NO. SYMBOL NAME AND FUNCTION
1, 9 1 2, 10 1B, 2B trigger inputs (positive-edge triggered) 3, 11 1 4, 12 1 72R 8 GND ground (0 V) 13, 5 1Q, 2Q outputs (active HIGH) 14, 6 1C 15 1R 16 V
NAME DESCRIPTION VERSION
DIP16 plastic dual in-line package; 16leads (300 mil); long body SOT38-1
SO16 plastic small outline package; 16 leads; body width 3.9 mm SOT109-1
SSOP16 plastic shrink small outline package; 16 leads; body width 5.3 mm SOT338-1
TSSOP16 plastic thin shrink small outline package; 16 leads; body width 4.4 mm SOT403-1
A, 2A trigger inputs (negative-edge triggered)
RD, 2R
D
Q, 2Q outputs (active LOW)
EXT/CEXT
, 2C
EXT EXT/CEXT
CC
EXT
PACKAGE
direct reset LOW and trigger action at positive edge
external resistor/capacitor connection
external capacitor connection external resistor/capacitor connection positive supply voltage
74HC/HCT123
Fig.1 Pin configuration. Fig.2 Logic symbol. Fig.3 IEC logic symbol.
1998 Jul 08 3
Philips Semiconductors Product specification
Dual retriggerable monostable multivibrator with reset

FUNCTION TABLE

nRDnAnBnQ nQ
LXXL H XHX L XXL L HL
HH LH
Note
1. If the monostable was triggered before this condition was
Fig.4 Functional diagram.
established, the pulse will continue as programmed.
INPUTS OUTPUTS
(1) (1)
(1)
H
(1)
H
74HC/HCT123
H = HIGH voltage level L = LOW voltage level X = don’t care
= LOW-to-HIGH transition = HIGH-to-LOW transition
= one HIGH level output pulse = one LOW level output pulse
(1) For minimum noise generation,
it is recommended to ground pins 6 (2C and 14 (1C
) externally to pin 8 (GND).
EXT
EXT
)
Fig.5 Logic diagram.
1998 Jul 08 4
Philips Semiconductors Product specification
Dual retriggerable monostable multivibrator with reset
Fig.6 Timing component connections.
DC CHARACTERISTICS FOR 74HC
For the DC characteristics see Output capability: standard (except for nR
ICC category: MSI
“74HC/HCT/HCU/HCMOS Logic Family Specifications”
EXT/CEXT
74HC/HCT123
.
)
1998 Jul 08 5
Philips Semiconductors Product specification
Dual retriggerable monostable multivibrator with reset
AC CHARACTERISTICS FOR 74HC
GND = 0 V; t
SYMBOL PARAMETER
t
PLH
t
PLH
t
PHL
t
PLH
/ t
t
THL
TLH
t
W
t
W
t
W
t
W
t
W
t
rt
R
EXT
C
EXT
= 6 ns; CL=50pF
r=tf
propagation delay
nRD, nA, nB to nQ
propagation delay
nRD, nA, nB to nQ
propagation delay
nRD to nQ (reset)
propagation delay
nRD to nQ (reset)
output transition time
trigger pulse width
nA = LOW
trigger pulse width
nB = HIGH
reset pulse width
nRD= LOW
output pulse width
nQ = HIGH nQ = LOW
output pulse width
nQ = HIGH nQ = LOW
retrigger time
nA, nB
external timing resistor
external timing capacitor
min. typ. max. min. max. min. max.
83 30 24
83 30 24
66 24 19
66 24 19
19 7 6
100
8
20
3
17
2
100
17
20
6
17
5
100
14
20
5
17
4
450 −−µs 5.0
75 −−ns 5.0
110 −−ns 5.0
10 2
T
(°C)
amb
74HC
+25 40 to +85 40 to +125
255 51 43
255 51 43
215 43 37
215 43 37
75 15 13
1000 1000
320 64
385 7765ns
54 320
64
385 7765ns
54 270
54
325 6555ns
46 270
54
325 6555ns
46 95
19
110 2219ns
16
125 25 21
125 25 21
125 25 21
150 30 26
150 30 26
150 30 26
−−k
no limits pF 5.0 Fig.9; note 3
UNIT
ns
ns
ns
74HC/HCT123
TEST CONDITIONS
V
(V)
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
5.0
CC
WAVEFORMS/
NOTES
C
= 0 pF;
EXT
R
=5k
EXT
C
= 0 pF;
EXT
R
=5k
EXT
C
= 0 pF;
EXT
R
=5k
EXT
C
= 0 pF;
EXT
R
=5k
EXT
Fig.7
Fig.7
Fig.8
C
= 100 nF;
EXT
R
=10kΩ;
EXT
Figs 7 and 8 C
= 0 pF;
EXT
R
=5kΩ;
EXT
note 1; Figs 7 and 8 C
= 0 pF;
EXT
R
=5kΩ;
EXT
note 2; Fig.7 Fig.9
1998 Jul 08 6
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