Philips 74HC7266U, 74HC7266N, 74HC7266DB, 74HC7266D Datasheet

DATA SH EET
Product specification File under Integrated Circuits, IC06
December 1990
INTEGRATED CIRCUITS
74HC7266
Quad 2-input EXCLUSIVE-NOR gate
The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications
The IC06 74HC/HCT/HCU/HCMOS Logic Package Information
The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines
December 1990 2
Philips Semiconductors Product specification
Quad 2-input EXCLUSIVE-NOR gate 74HC7266
FEATURES
Output capability: standard
ICC category: SSI
GENERAL DESCRIPTION
The 74HC7266 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A.
The 74HC7266 provide the EXCLUSIVE-NOR function with active push-pull output.
QUICK REFERENCE DATA
GND = 0 V; T
amb
=25°C; tr=tf= 6 ns
Notes
1. C
PD
is used to determine the dynamic power dissipation (PD in µW):
PD=CPD× V
CC
2
× fi+ (CL× V
CC
2
× fo) where: fi= input frequency in MHz fo= output frequency in MHz CL= output load capacitance in pF VCC= supply voltage in V (CV
CC
2
× fo) = sum of outputs
2. For HC the condition is VI= GND to V
CC
For HCT the condition is VI= GND to VCC− 1.5 V
ORDERING INFORMATION
See
“74HC/HCT/HCU/HCMOS Logic Package Information”
.
SYMBOL PARAMETER CONDITIONS
TYPICAL
UNIT
HC
t
PHL/ tPLH
propagation delay nA, nB to nY CL= 15 pF; VCC=5 V 11 ns
C
I
input capacitance 3.5 pF
C
PD
power dissipation capacitance per gate note 1 17 pF
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