Philips 74HCT643U, 74HCT643N, 74HCT643D, 74HC643U, 74HC643N Datasheet

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DATA SH EET
Product specification File under Integrated Circuits, IC06
December 1990
INTEGRATED CIRCUITS
74HC/HCT643
Octal bus transceiver; 3-state; true/inverting
The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications
The IC06 74HC/HCT/HCU/HCMOS Logic Package Information
The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines
December 1990 2
Philips Semiconductors Product specification
Octal bus transceiver; 3-state; true/inverting
74HC/HCT643
FEATURES
Octal bidirectional bus interface
True and inverting 3-state outputs
Output capability: bus driver
ICC category: MSI
GENERAL DESCRIPTION
The 74HC/HCT643 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A.
The 74HC/HCT643 are octal transceivers featuring true and inverting 3-state bus compatible outputs in both send and receive directions.
The “643” features an output enable (OE) input for easy cascading and a send/receive (DIR) for direction control. OE controls the outputs so that the buses are effectively isolated.
QUICK REFERENCE DATA
GND = 0 V; T
amb
=25°C; tr=tf=6ns
Notes
1. C
PD
is used to determine the dynamic power dissipation (PD in µW):
PD=CPD× V
CC
2
× fi+ (CL× V
CC
2
× fo) where: fi= input frequency in MHz fo= output frequency in MHz (CV
CC
2
× fo) = sum of outputs CL= output load capacitance in pF VCC= supply voltage in V
2. For HC the condition is VI= GND to V
CC
For HCT the condition is VI= GND to VCC−1.5 V
ORDERING INFORMATION
See
“74HC/HCT/HCU/HCMOS Logic Package Information”
.
SYMBOL PARAMETER CONDITIONS
TYPICAL
UNIT
HC HCT
t
PHL
/
t
PLH
propagation delay
An to Bn; inverting Bn to An; true
CL= 15 pF; VCC= 5 V
7 8
8 11
ns ns
C
I
input capacitance 3.5 3.5 pF
C
I/O
input/output capacitance 10 10 pF
C
PD
power dissipation capacitance per transceiver notes 1 and 2 42 44 pF
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